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Fix I2C/COMD/OPCODE values (esp-rs#267)
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playfulFence authored Aug 13, 2024
1 parent db62264 commit 5270c86
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Showing 10 changed files with 189 additions and 178 deletions.
9 changes: 5 additions & 4 deletions common_patches/i2c0.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -28,8 +28,9 @@ COMD%s:
access: read-write
OPCODE:
_name: Opcode
Rstart: [0, RSTART opcode]
Write: [1, WRITE opcode]
Read: [2, READ opcode]
Stop: [3, STOP opcode]
End: [4, END opcode]
Read: [3, READ opcode]
Stop: [2, STOP opcode]
End: [4, END opcode]
Rstart: [6, RSTART opcode]

8 changes: 8 additions & 0 deletions common_patches/i2c_opcode.yaml
Original file line number Diff line number Diff line change
@@ -0,0 +1,8 @@
COMD%s:
OPCODE:
_replace_enum:
Rstart: [0, RSTART opcode]
Write: [1, WRITE opcode]
Read: [2, READ opcode]
Stop: [3, STOP opcode]
End: [4, END opcode]
1 change: 1 addition & 0 deletions esp32/svd/patches/esp32.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -6,6 +6,7 @@ I2C0:
name: INT_ST
_include:
- ../../../common_patches/i2c0.yaml
- ../../../common_patches/i2c_opcode.yaml

RTC_I2C:
_modify:
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58 changes: 29 additions & 29 deletions esp32c2/src/i2c0/comd.rs
Original file line number Diff line number Diff line change
Expand Up @@ -23,16 +23,16 @@ pub type ACK_VALUE_W<'a, REG> = crate::BitWriter<'a, REG>;
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
#[repr(u8)]
pub enum OPCODE {
#[doc = "0: RSTART opcode"]
Rstart = 0,
#[doc = "1: WRITE opcode"]
Write = 1,
#[doc = "2: READ opcode"]
Read = 2,
#[doc = "3: STOP opcode"]
Stop = 3,
#[doc = "2: STOP opcode"]
Stop = 2,
#[doc = "3: READ opcode"]
Read = 3,
#[doc = "4: END opcode"]
End = 4,
#[doc = "6: RSTART opcode"]
Rstart = 6,
}
impl From<OPCODE> for u8 {
#[inline(always)]
Expand All @@ -51,39 +51,39 @@ impl OPCODE_R {
#[inline(always)]
pub const fn variant(&self) -> Option<OPCODE> {
match self.bits {
0 => Some(OPCODE::Rstart),
1 => Some(OPCODE::Write),
2 => Some(OPCODE::Read),
3 => Some(OPCODE::Stop),
2 => Some(OPCODE::Stop),
3 => Some(OPCODE::Read),
4 => Some(OPCODE::End),
6 => Some(OPCODE::Rstart),
_ => None,
}
}
#[doc = "RSTART opcode"]
#[inline(always)]
pub fn is_rstart(&self) -> bool {
*self == OPCODE::Rstart
}
#[doc = "WRITE opcode"]
#[inline(always)]
pub fn is_write(&self) -> bool {
*self == OPCODE::Write
}
#[doc = "READ opcode"]
#[inline(always)]
pub fn is_read(&self) -> bool {
*self == OPCODE::Read
}
#[doc = "STOP opcode"]
#[inline(always)]
pub fn is_stop(&self) -> bool {
*self == OPCODE::Stop
}
#[doc = "READ opcode"]
#[inline(always)]
pub fn is_read(&self) -> bool {
*self == OPCODE::Read
}
#[doc = "END opcode"]
#[inline(always)]
pub fn is_end(&self) -> bool {
*self == OPCODE::End
}
#[doc = "RSTART opcode"]
#[inline(always)]
pub fn is_rstart(&self) -> bool {
*self == OPCODE::Rstart
}
}
#[doc = "Field `OPCODE` writer - Opcode part of command %s."]
pub type OPCODE_W<'a, REG> = crate::FieldWriter<'a, REG, 3, OPCODE>;
Expand All @@ -92,31 +92,31 @@ where
REG: crate::Writable + crate::RegisterSpec,
REG::Ux: From<u8>,
{
#[doc = "RSTART opcode"]
#[inline(always)]
pub fn rstart(self) -> &'a mut crate::W<REG> {
self.variant(OPCODE::Rstart)
}
#[doc = "WRITE opcode"]
#[inline(always)]
pub fn write(self) -> &'a mut crate::W<REG> {
self.variant(OPCODE::Write)
}
#[doc = "READ opcode"]
#[inline(always)]
pub fn read(self) -> &'a mut crate::W<REG> {
self.variant(OPCODE::Read)
}
#[doc = "STOP opcode"]
#[inline(always)]
pub fn stop(self) -> &'a mut crate::W<REG> {
self.variant(OPCODE::Stop)
}
#[doc = "READ opcode"]
#[inline(always)]
pub fn read(self) -> &'a mut crate::W<REG> {
self.variant(OPCODE::Read)
}
#[doc = "END opcode"]
#[inline(always)]
pub fn end(self) -> &'a mut crate::W<REG> {
self.variant(OPCODE::End)
}
#[doc = "RSTART opcode"]
#[inline(always)]
pub fn rstart(self) -> &'a mut crate::W<REG> {
self.variant(OPCODE::Rstart)
}
}
#[doc = "Field `COMMAND_DONE` reader - When command 0 is done in I2C Master mode, this bit changes to high level."]
pub type COMMAND_DONE_R = crate::BitReader;
Expand Down
58 changes: 29 additions & 29 deletions esp32c3/src/i2c0/comd.rs
Original file line number Diff line number Diff line change
Expand Up @@ -23,16 +23,16 @@ pub type ACK_VALUE_W<'a, REG> = crate::BitWriter<'a, REG>;
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
#[repr(u8)]
pub enum OPCODE {
#[doc = "0: RSTART opcode"]
Rstart = 0,
#[doc = "1: WRITE opcode"]
Write = 1,
#[doc = "2: READ opcode"]
Read = 2,
#[doc = "3: STOP opcode"]
Stop = 3,
#[doc = "2: STOP opcode"]
Stop = 2,
#[doc = "3: READ opcode"]
Read = 3,
#[doc = "4: END opcode"]
End = 4,
#[doc = "6: RSTART opcode"]
Rstart = 6,
}
impl From<OPCODE> for u8 {
#[inline(always)]
Expand All @@ -51,39 +51,39 @@ impl OPCODE_R {
#[inline(always)]
pub const fn variant(&self) -> Option<OPCODE> {
match self.bits {
0 => Some(OPCODE::Rstart),
1 => Some(OPCODE::Write),
2 => Some(OPCODE::Read),
3 => Some(OPCODE::Stop),
2 => Some(OPCODE::Stop),
3 => Some(OPCODE::Read),
4 => Some(OPCODE::End),
6 => Some(OPCODE::Rstart),
_ => None,
}
}
#[doc = "RSTART opcode"]
#[inline(always)]
pub fn is_rstart(&self) -> bool {
*self == OPCODE::Rstart
}
#[doc = "WRITE opcode"]
#[inline(always)]
pub fn is_write(&self) -> bool {
*self == OPCODE::Write
}
#[doc = "READ opcode"]
#[inline(always)]
pub fn is_read(&self) -> bool {
*self == OPCODE::Read
}
#[doc = "STOP opcode"]
#[inline(always)]
pub fn is_stop(&self) -> bool {
*self == OPCODE::Stop
}
#[doc = "READ opcode"]
#[inline(always)]
pub fn is_read(&self) -> bool {
*self == OPCODE::Read
}
#[doc = "END opcode"]
#[inline(always)]
pub fn is_end(&self) -> bool {
*self == OPCODE::End
}
#[doc = "RSTART opcode"]
#[inline(always)]
pub fn is_rstart(&self) -> bool {
*self == OPCODE::Rstart
}
}
#[doc = "Field `OPCODE` writer - Opcode part of command %s."]
pub type OPCODE_W<'a, REG> = crate::FieldWriter<'a, REG, 3, OPCODE>;
Expand All @@ -92,31 +92,31 @@ where
REG: crate::Writable + crate::RegisterSpec,
REG::Ux: From<u8>,
{
#[doc = "RSTART opcode"]
#[inline(always)]
pub fn rstart(self) -> &'a mut crate::W<REG> {
self.variant(OPCODE::Rstart)
}
#[doc = "WRITE opcode"]
#[inline(always)]
pub fn write(self) -> &'a mut crate::W<REG> {
self.variant(OPCODE::Write)
}
#[doc = "READ opcode"]
#[inline(always)]
pub fn read(self) -> &'a mut crate::W<REG> {
self.variant(OPCODE::Read)
}
#[doc = "STOP opcode"]
#[inline(always)]
pub fn stop(self) -> &'a mut crate::W<REG> {
self.variant(OPCODE::Stop)
}
#[doc = "READ opcode"]
#[inline(always)]
pub fn read(self) -> &'a mut crate::W<REG> {
self.variant(OPCODE::Read)
}
#[doc = "END opcode"]
#[inline(always)]
pub fn end(self) -> &'a mut crate::W<REG> {
self.variant(OPCODE::End)
}
#[doc = "RSTART opcode"]
#[inline(always)]
pub fn rstart(self) -> &'a mut crate::W<REG> {
self.variant(OPCODE::Rstart)
}
}
#[doc = "Field `COMMAND_DONE` reader - reg_command_done"]
pub type COMMAND_DONE_R = crate::BitReader;
Expand Down
58 changes: 29 additions & 29 deletions esp32c6/src/i2c0/comd.rs
Original file line number Diff line number Diff line change
Expand Up @@ -23,16 +23,16 @@ pub type ACK_VALUE_W<'a, REG> = crate::BitWriter<'a, REG>;
#[derive(Clone, Copy, Debug, PartialEq, Eq)]
#[repr(u8)]
pub enum OPCODE {
#[doc = "0: RSTART opcode"]
Rstart = 0,
#[doc = "1: WRITE opcode"]
Write = 1,
#[doc = "2: READ opcode"]
Read = 2,
#[doc = "3: STOP opcode"]
Stop = 3,
#[doc = "2: STOP opcode"]
Stop = 2,
#[doc = "3: READ opcode"]
Read = 3,
#[doc = "4: END opcode"]
End = 4,
#[doc = "6: RSTART opcode"]
Rstart = 6,
}
impl From<OPCODE> for u8 {
#[inline(always)]
Expand All @@ -51,39 +51,39 @@ impl OPCODE_R {
#[inline(always)]
pub const fn variant(&self) -> Option<OPCODE> {
match self.bits {
0 => Some(OPCODE::Rstart),
1 => Some(OPCODE::Write),
2 => Some(OPCODE::Read),
3 => Some(OPCODE::Stop),
2 => Some(OPCODE::Stop),
3 => Some(OPCODE::Read),
4 => Some(OPCODE::End),
6 => Some(OPCODE::Rstart),
_ => None,
}
}
#[doc = "RSTART opcode"]
#[inline(always)]
pub fn is_rstart(&self) -> bool {
*self == OPCODE::Rstart
}
#[doc = "WRITE opcode"]
#[inline(always)]
pub fn is_write(&self) -> bool {
*self == OPCODE::Write
}
#[doc = "READ opcode"]
#[inline(always)]
pub fn is_read(&self) -> bool {
*self == OPCODE::Read
}
#[doc = "STOP opcode"]
#[inline(always)]
pub fn is_stop(&self) -> bool {
*self == OPCODE::Stop
}
#[doc = "READ opcode"]
#[inline(always)]
pub fn is_read(&self) -> bool {
*self == OPCODE::Read
}
#[doc = "END opcode"]
#[inline(always)]
pub fn is_end(&self) -> bool {
*self == OPCODE::End
}
#[doc = "RSTART opcode"]
#[inline(always)]
pub fn is_rstart(&self) -> bool {
*self == OPCODE::Rstart
}
}
#[doc = "Field `OPCODE` writer - Opcode part of command %s."]
pub type OPCODE_W<'a, REG> = crate::FieldWriter<'a, REG, 3, OPCODE>;
Expand All @@ -92,31 +92,31 @@ where
REG: crate::Writable + crate::RegisterSpec,
REG::Ux: From<u8>,
{
#[doc = "RSTART opcode"]
#[inline(always)]
pub fn rstart(self) -> &'a mut crate::W<REG> {
self.variant(OPCODE::Rstart)
}
#[doc = "WRITE opcode"]
#[inline(always)]
pub fn write(self) -> &'a mut crate::W<REG> {
self.variant(OPCODE::Write)
}
#[doc = "READ opcode"]
#[inline(always)]
pub fn read(self) -> &'a mut crate::W<REG> {
self.variant(OPCODE::Read)
}
#[doc = "STOP opcode"]
#[inline(always)]
pub fn stop(self) -> &'a mut crate::W<REG> {
self.variant(OPCODE::Stop)
}
#[doc = "READ opcode"]
#[inline(always)]
pub fn read(self) -> &'a mut crate::W<REG> {
self.variant(OPCODE::Read)
}
#[doc = "END opcode"]
#[inline(always)]
pub fn end(self) -> &'a mut crate::W<REG> {
self.variant(OPCODE::End)
}
#[doc = "RSTART opcode"]
#[inline(always)]
pub fn rstart(self) -> &'a mut crate::W<REG> {
self.variant(OPCODE::Rstart)
}
}
#[doc = "Field `COMMAND_DONE` reader - When command 0 is done in I2C Master mode, this bit changes to high level."]
pub type COMMAND_DONE_R = crate::BitReader;
Expand Down
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