Fix SHA START and CONTINUE registers access (esp-rs#160)

* fix: Fix SHA regs access * fix: Fix SHA regs access - Sources
jessebraham · Sep 21, 2023 · c1283ca · c1283ca
1 parent 088531f
commit c1283ca
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Showing 4 changed files with 63 additions and 48 deletions.
diff --git a/esp32s3/src/sha.rs b/esp32s3/src/sha.rs
@@ -48,11 +48,11 @@ pub mod t_length;
 pub type DMA_BLOCK_NUM = crate::Reg<dma_block_num::DMA_BLOCK_NUM_SPEC>;
 #[doc = "DMA configuration register 0."]
 pub mod dma_block_num;
-#[doc = "START (r) register accessor: Typical SHA configuration register 0.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`start::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`start`] module"]
+#[doc = "START (w) register accessor: Typical SHA configuration register 0.\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`start::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`start`] module"]
 pub type START = crate::Reg<start::START_SPEC>;
 #[doc = "Typical SHA configuration register 0."]
 pub mod start;
-#[doc = "CONTINUE (r) register accessor: Typical SHA configuration register 1.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`continue_::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`continue_`] module"]
+#[doc = "CONTINUE (w) register accessor: Typical SHA configuration register 1.\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`continue_::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`continue_`] module"]
 pub type CONTINUE = crate::Reg<continue_::CONTINUE_SPEC>;
 #[doc = "Typical SHA configuration register 1."]
 pub mod continue_;

diff --git a/esp32s3/src/sha/continue_.rs b/esp32s3/src/sha/continue_.rs
@@ -1,35 +1,37 @@
-#[doc = "Register `CONTINUE` reader"]
-pub type R = crate::R<CONTINUE_SPEC>;
-#[doc = "Field `CONTINUE` reader - reserved."]
-pub type CONTINUE_R = crate::FieldReader<u32>;
-impl R {
-    #[doc = "Bits 1:31 - reserved."]
-    #[inline(always)]
-    pub fn continue_(&self) -> CONTINUE_R {
-        CONTINUE_R::new((self.bits >> 1) & 0x7fff_ffff)
-    }
-}
-#[cfg(feature = "impl-register-debug")]
-impl core::fmt::Debug for R {
-    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
-        f.debug_struct("CONTINUE")
-            .field("continue_", &format_args!("{}", self.continue_().bits()))
-            .finish()
-    }
-}
+#[doc = "Register `CONTINUE` writer"]
+pub type W = crate::W<CONTINUE_SPEC>;
+#[doc = "Field `CONTINUE` writer - reserved."]
+pub type CONTINUE_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 31, O, u32>;
 #[cfg(feature = "impl-register-debug")]
 impl core::fmt::Debug for crate::generic::Reg<CONTINUE_SPEC> {
     fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
-        self.read().fmt(f)
+        write!(f, "(not readable)")
     }
 }
-#[doc = "Typical SHA configuration register 1.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`continue_::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+impl W {
+    #[doc = "Bits 1:31 - reserved."]
+    #[inline(always)]
+    #[must_use]
+    pub fn continue_(&mut self) -> CONTINUE_W<CONTINUE_SPEC, 1> {
+        CONTINUE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+}
+#[doc = "Typical SHA configuration register 1.\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`continue_::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct CONTINUE_SPEC;
 impl crate::RegisterSpec for CONTINUE_SPEC {
     type Ux = u32;
 }
-#[doc = "`read()` method returns [`continue_::R`](R) reader structure"]
-impl crate::Readable for CONTINUE_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`continue_::W`](W) writer structure"]
+impl crate::Writable for CONTINUE_SPEC {
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
 #[doc = "`reset()` method sets CONTINUE to value 0"]
 impl crate::Resettable for CONTINUE_SPEC {
     const RESET_VALUE: Self::Ux = 0;

diff --git a/esp32s3/src/sha/start.rs b/esp32s3/src/sha/start.rs
@@ -1,35 +1,37 @@
-#[doc = "Register `START` reader"]
-pub type R = crate::R<START_SPEC>;
-#[doc = "Field `START` reader - reserved."]
-pub type START_R = crate::FieldReader<u32>;
-impl R {
-    #[doc = "Bits 1:31 - reserved."]
-    #[inline(always)]
-    pub fn start(&self) -> START_R {
-        START_R::new((self.bits >> 1) & 0x7fff_ffff)
-    }
-}
-#[cfg(feature = "impl-register-debug")]
-impl core::fmt::Debug for R {
-    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
-        f.debug_struct("START")
-            .field("start", &format_args!("{}", self.start().bits()))
-            .finish()
-    }
-}
+#[doc = "Register `START` writer"]
+pub type W = crate::W<START_SPEC>;
+#[doc = "Field `START` writer - reserved."]
+pub type START_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 31, O, u32>;
 #[cfg(feature = "impl-register-debug")]
 impl core::fmt::Debug for crate::generic::Reg<START_SPEC> {
     fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
-        self.read().fmt(f)
+        write!(f, "(not readable)")
     }
 }
-#[doc = "Typical SHA configuration register 0.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`start::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
+impl W {
+    #[doc = "Bits 1:31 - reserved."]
+    #[inline(always)]
+    #[must_use]
+    pub fn start(&mut self) -> START_W<START_SPEC, 1> {
+        START_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.bits = bits;
+        self
+    }
+}
+#[doc = "Typical SHA configuration register 0.\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`start::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
 pub struct START_SPEC;
 impl crate::RegisterSpec for START_SPEC {
     type Ux = u32;
 }
-#[doc = "`read()` method returns [`start::R`](R) reader structure"]
-impl crate::Readable for START_SPEC {}
+#[doc = "`write(|w| ..)` method takes [`start::W`](W) writer structure"]
+impl crate::Writable for START_SPEC {
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
 #[doc = "`reset()` method sets START to value 0"]
 impl crate::Resettable for START_SPEC {
     const RESET_VALUE: Self::Ux = 0;

diff --git a/esp32s3/svd/patches/esp32s3.yaml b/esp32s3/svd/patches/esp32s3.yaml
@@ -1 +1,12 @@
 _svd: ../esp32s3.base.svd
+
+SHA:
+  START:
+    _modify:
+      START:
+        access: write-only
+
+  CONTINUE:
+    _modify:
+      CONTINUE:
+        access: write-only