hw/bsp: Fix Watchdog interval for STM32 BSPs

Default value 30s is out of range for all STM32 devices. This sets WATCHDOG_INTERVAL to maximum correct value that depends on LSI_VALUE for each MCU. Additionally static assert is added to hal_watchdog.c that checks if WATCHDOG_INTERVAL value does not exceed range.
kasjer · May 29, 2024 · 5c11744 · 5c11744
1 parent 43525cb
commit 5c11744
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diff --git a/hw/bsp/ada_feather_stm32f405/syscfg.yml b/hw/bsp/ada_feather_stm32f405/syscfg.yml
@@ -48,6 +48,7 @@ syscfg.vals:
     STM32_FLASH_PREFETCH_ENABLE: 1
     STM32_INSTRUCTION_CACHE_ENABLE: 1
     STM32_DATA_CACHE_ENABLE: 1
+    WATCHDOG_INTERVAL: 28000
     # UART0 is on the large breakout connector, pins TX and RX.
     UART_0_PIN_TX: 'MCU_GPIO_PORTB(10)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTB(11)'

diff --git a/hw/bsp/b-l072z-lrwan1/syscfg.yml b/hw/bsp/b-l072z-lrwan1/syscfg.yml
@@ -51,6 +51,7 @@ syscfg.vals:
     STM32_CLOCK_APB2_DIVIDER: 'RCC_HCLK_DIV1'
     STM32_FLASH_LATENCY: 1  # max 32MHz
     STM32_FLASH_PREFETCH_ENABLE: 0
+    WATCHDOG_INTERVAL: 25000
     UART_0_PIN_TX: 'MCU_GPIO_PORTA(2)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTA(3)'
     SPI_1_CUSTOM_CFG: 1

diff --git a/hw/bsp/b-l475e-iot01a/syscfg.yml b/hw/bsp/b-l475e-iot01a/syscfg.yml
@@ -59,6 +59,7 @@ syscfg.vals:
     STM32_FLASH_PREFETCH_ENABLE: 0
     STM32_INSTRUCTION_CACHE_ENABLE: 1
     STM32_DATA_CACHE_ENABLE: 1
+    WATCHDOG_INTERVAL: 25000
     UART_0_PIN_TX: 'MCU_GPIO_PORTB(6)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTB(7)'
     I2C_0_PIN_SCL: 'MCU_GPIO_PORTB(8)'

diff --git a/hw/bsp/black_vet6/syscfg.yml b/hw/bsp/black_vet6/syscfg.yml
@@ -64,6 +64,7 @@ syscfg.vals:
     STM32_FLASH_PREFETCH_ENABLE: 1
     STM32_INSTRUCTION_CACHE_ENABLE: 1
     STM32_DATA_CACHE_ENABLE: 1
+    WATCHDOG_INTERVAL: 25000
 
     SPI_0_MASTER: 1
     # On board SPIFLASH configuration for W25Q16VBS

diff --git a/hw/bsp/bluepill/syscfg.yml b/hw/bsp/bluepill/syscfg.yml
@@ -39,6 +39,7 @@ syscfg.vals:
     STM32_CLOCK_APB2_DIVIDER: 'RCC_HCLK_DIV1'
     STM32_FLASH_LATENCY: 'FLASH_LATENCY_2'
     STM32_FLASH_PREFETCH_ENABLE: 1
+    WATCHDOG_INTERVAL: 22000
     UART_0_PIN_TX: 'MCU_GPIO_PORTA(2)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTA(3)'
     SPI_0_PIN_SS: 'MCU_GPIO_PORTA(4)'

diff --git a/hw/bsp/nucleo-f030r8/syscfg.yml b/hw/bsp/nucleo-f030r8/syscfg.yml
@@ -41,6 +41,7 @@ syscfg.vals:
     STM32_CLOCK_APB1_DIVIDER: 'RCC_HCLK_DIV1'
     STM32_FLASH_LATENCY: 'FLASH_LATENCY_1'
     STM32_FLASH_PREFETCH_ENABLE: 1
+    WATCHDOG_INTERVAL: 22000
     UART_0_PIN_TX: 'MCU_GPIO_PORTA(2)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTA(3)'
     UART_1_PIN_TX: 'MCU_GPIO_PORTA(9)'

diff --git a/hw/bsp/nucleo-f072rb/syscfg.yml b/hw/bsp/nucleo-f072rb/syscfg.yml
@@ -41,6 +41,7 @@ syscfg.vals:
     STM32_CLOCK_APB1_DIVIDER: 'RCC_HCLK_DIV1'
     STM32_FLASH_LATENCY: 'FLASH_LATENCY_1'
     STM32_FLASH_PREFETCH_ENABLE: 1
+    WATCHDOG_INTERVAL: 22000
     UART_0_PIN_TX: 'MCU_GPIO_PORTA(2)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTA(3)'
     UART_1_PIN_TX: 'MCU_GPIO_PORTA(9)'

diff --git a/hw/bsp/nucleo-f103rb/syscfg.yml b/hw/bsp/nucleo-f103rb/syscfg.yml
@@ -39,6 +39,7 @@ syscfg.vals:
     STM32_CLOCK_APB2_DIVIDER: 'RCC_HCLK_DIV1'
     STM32_FLASH_LATENCY: 'FLASH_LATENCY_2'
     STM32_FLASH_PREFETCH_ENABLE: 1
+    WATCHDOG_INTERVAL: 22000
     UART_0_PIN_TX: 'MCU_GPIO_PORTA(2)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTA(3)'
     UART_1_PIN_TX: 'MCU_GPIO_PORTA(9)'

diff --git a/hw/bsp/nucleo-f303k8/syscfg.yml b/hw/bsp/nucleo-f303k8/syscfg.yml
@@ -37,6 +37,7 @@ syscfg.vals:
     STM32_CLOCK_APB2_DIVIDER: 'RCC_HCLK_DIV1'
     STM32_FLASH_LATENCY: 'FLASH_LATENCY_2'
     STM32_FLASH_PREFETCH_ENABLE: 1
+    WATCHDOG_INTERVAL: 22000
     UART_0_PIN_TX: 'MCU_GPIO_PORTA(2)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTA(15)'
     UART_0_PIN_RTS: 'MCU_GPIO_PORTA(1)'

diff --git a/hw/bsp/nucleo-f303re/syscfg.yml b/hw/bsp/nucleo-f303re/syscfg.yml
@@ -37,6 +37,7 @@ syscfg.vals:
     STM32_CLOCK_APB2_DIVIDER: 'RCC_HCLK_DIV1'
     STM32_FLASH_LATENCY: 'FLASH_LATENCY_2'
     STM32_FLASH_PREFETCH_ENABLE: 1
+    WATCHDOG_INTERVAL: 19000
     UART_0_PIN_TX: 'MCU_GPIO_PORTA(2)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTA(3)'
     UART_0_PIN_RTS: 'MCU_GPIO_PORTA(1)'

diff --git a/hw/bsp/nucleo-f401re/syscfg.yml b/hw/bsp/nucleo-f401re/syscfg.yml
@@ -48,6 +48,7 @@ syscfg.vals:
     STM32_FLASH_PREFETCH_ENABLE: 1
     STM32_INSTRUCTION_CACHE_ENABLE: 1
     STM32_DATA_CACHE_ENABLE: 1
+    WATCHDOG_INTERVAL: 28000
     UART_0_PIN_TX: 'MCU_GPIO_PORTA(2)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTA(3)'
     UART_0_PIN_RTS: 'MCU_GPIO_PORTA(1)'

diff --git a/hw/bsp/nucleo-f411re/syscfg.yml b/hw/bsp/nucleo-f411re/syscfg.yml
@@ -49,6 +49,7 @@ syscfg.vals:
     STM32_FLASH_PREFETCH_ENABLE: 1
     STM32_INSTRUCTION_CACHE_ENABLE: 1
     STM32_DATA_CACHE_ENABLE: 1
+    WATCHDOG_INTERVAL: 28000
     UART_0_PIN_TX: 'MCU_GPIO_PORTA(2)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTA(3)'
     UART_1_PIN_TX: 'MCU_GPIO_PORTA(9)'

diff --git a/hw/bsp/nucleo-f413zh/syscfg.yml b/hw/bsp/nucleo-f413zh/syscfg.yml
@@ -50,6 +50,7 @@ syscfg.vals:
     STM32_FLASH_PREFETCH_ENABLE: 1
     STM32_INSTRUCTION_CACHE_ENABLE: 1
     STM32_DATA_CACHE_ENABLE: 1
+    WATCHDOG_INTERVAL: 28000
     UART_0_PIN_TX: 'MCU_GPIO_PORTD(8)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTD(9)'
     SPI_0_PIN_SS: 'MCU_GPIO_PORTA(4)'

diff --git a/hw/bsp/nucleo-f439zi/syscfg.yml b/hw/bsp/nucleo-f439zi/syscfg.yml
@@ -49,6 +49,7 @@ syscfg.vals:
     STM32_FLASH_PREFETCH_ENABLE: 1
     STM32_INSTRUCTION_CACHE_ENABLE: 1
     STM32_DATA_CACHE_ENABLE: 1
+    WATCHDOG_INTERVAL: 28000
     UART_0_PIN_TX: 'MCU_GPIO_PORTD(8)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTD(9)'
     UART_1_PIN_TX: 'MCU_GPIO_PORTD(5)'

diff --git a/hw/bsp/nucleo-f746zg/syscfg.yml b/hw/bsp/nucleo-f746zg/syscfg.yml
@@ -46,6 +46,7 @@ syscfg.vals:
     STM32_FLASH_LATENCY: 'FLASH_LATENCY_7'
     STM32_FLASH_PREFETCH_ENABLE: 1
     STM32_ART_ACCLERATOR_ENABLE: 1
+    WATCHDOG_INTERVAL: 28000
     UART_0_PIN_TX: 'MCU_GPIO_PORTD(8)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTD(9)'
     SPI_0_PIN_SS: 'MCU_GPIO_PORTD(14)'

diff --git a/hw/bsp/nucleo-f767zi/syscfg.yml b/hw/bsp/nucleo-f767zi/syscfg.yml
@@ -47,6 +47,7 @@ syscfg.vals:
     STM32_FLASH_LATENCY: 'FLASH_LATENCY_7'
     STM32_FLASH_PREFETCH_ENABLE: 1
     STM32_ART_ACCLERATOR_ENABLE: 1
+    WATCHDOG_INTERVAL: 28000
     UART_0_PIN_TX: 'MCU_GPIO_PORTD(8)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTD(9)'
     SPI_0_PIN_SS: 'MCU_GPIO_PORTD(14)'

diff --git a/hw/bsp/nucleo-g0b1re/syscfg.yml b/hw/bsp/nucleo-g0b1re/syscfg.yml
@@ -51,6 +51,7 @@ syscfg.vals:
     STM32_CLOCK_APB4_DIVIDER: 'RCC_HCLK_DIV1'
     STM32_CLOCK_PLLRGE: 'RCC_PLLVCIRANGE_0'
     STM32_FLASH_LATENCY: 'FLASH_LATENCY_2'
+    WATCHDOG_INTERVAL: 28000
     UART_0: 0
     UART_1: 1
     UART_0_PIN_TX: 'MCU_GPIO_PORTC(4)'

diff --git a/hw/bsp/nucleo-g491re/syscfg.yml b/hw/bsp/nucleo-g491re/syscfg.yml
@@ -51,6 +51,7 @@ syscfg.vals:
     STM32_CLOCK_APB4_DIVIDER: 'RCC_HCLK_DIV1'
     STM32_CLOCK_PLLRGE: 'RCC_PLLVCIRANGE_0'
     STM32_FLASH_LATENCY: 'FLASH_LATENCY_4'
+    WATCHDOG_INTERVAL: 28000
     UART_0_PIN_TX: 'MCU_GPIO_PORTA(9)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTA(10)'
     UART_1_PIN_TX: 'MCU_GPIO_PORTA(2)'

diff --git a/hw/bsp/nucleo-h723zg/syscfg.yml b/hw/bsp/nucleo-h723zg/syscfg.yml
@@ -57,6 +57,7 @@ syscfg.vals:
     STM32_CLOCK_PLLRGE: 'RCC_PLL1VCIRANGE_3'
     STM32_FLASH_LATENCY: 'FLASH_LATENCY_3'
     STM32_ENABLE_ICACHE: 0
+    WATCHDOG_INTERVAL: 28000
     UART_0_PIN_TX: 'MCU_GPIO_PORTD(8)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTD(9)'
     SPI_0_PIN_SS: 'MCU_GPIO_PORTD(14)'

diff --git a/hw/bsp/nucleo-l073rz/syscfg.yml b/hw/bsp/nucleo-l073rz/syscfg.yml
@@ -57,6 +57,7 @@ syscfg.vals:
     STM32_CLOCK_APB2_DIVIDER: 'RCC_HCLK_DIV1'
     STM32_FLASH_LATENCY: 1  # max 32MHz
     STM32_FLASH_PREFETCH_ENABLE: 0
+    WATCHDOG_INTERVAL: 25000
     UART_0_PIN_TX: 'MCU_GPIO_PORTA(2)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTA(3)'
     UART_1_PIN_TX: 'MCU_GPIO_PORTA(9)'

diff --git a/hw/bsp/nucleo-l476rg/syscfg.yml b/hw/bsp/nucleo-l476rg/syscfg.yml
@@ -56,6 +56,7 @@ syscfg.vals:
     STM32_FLASH_PREFETCH_ENABLE: 0
     STM32_INSTRUCTION_CACHE_ENABLE: 1
     STM32_DATA_CACHE_ENABLE: 1
+    WATCHDOG_INTERVAL: 25000
     UART_0_PIN_TX: 'MCU_GPIO_PORTA(2)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTA(3)'
     UART_1_PIN_TX: 'MCU_GPIO_PORTA(9)'

diff --git a/hw/bsp/nucleo-u575zi-q/syscfg.yml b/hw/bsp/nucleo-u575zi-q/syscfg.yml
@@ -52,6 +52,7 @@ syscfg.vals:
     STM32_CLOCK_APB4_DIVIDER: 'RCC_HCLK_DIV1'
     STM32_CLOCK_PLLRGE: 'RCC_PLLVCIRANGE_0'
     STM32_FLASH_LATENCY: 'FLASH_LATENCY_4'
+    WATCHDOG_INTERVAL: 28000
     UART_0_PIN_TX: 'MCU_GPIO_PORTA(9)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTA(10)'
     UART_1_PIN_TX: 'MCU_GPIO_PORTD(5)'

diff --git a/hw/bsp/olimex-p103/syscfg.yml b/hw/bsp/olimex-p103/syscfg.yml
@@ -42,6 +42,7 @@ syscfg.vals:
     STM32_CLOCK_APB2_DIVIDER: 'RCC_HCLK_DIV1'
     STM32_FLASH_LATENCY: 'FLASH_LATENCY_2'
     STM32_FLASH_PREFETCH_ENABLE: 1
+    WATCHDOG_INTERVAL: 22000
     UART_0_PIN_TX: 'MCU_GPIO_PORTA(2)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTA(3)'
     SPI_0_PIN_SS: 'MCU_GPIO_PORTA(4)'

diff --git a/hw/bsp/olimex_stm32-e407_devboard/syscfg.yml b/hw/bsp/olimex_stm32-e407_devboard/syscfg.yml
@@ -48,6 +48,7 @@ syscfg.vals:
     STM32_FLASH_PREFETCH_ENABLE: 1
     STM32_INSTRUCTION_CACHE_ENABLE: 1
     STM32_DATA_CACHE_ENABLE: 1
+    WATCHDOG_INTERVAL: 28000
     UART_0_PIN_TX: 'MCU_GPIO_PORTC(6)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTC(7)'
     SPI_0_PIN_SS: 'MCU_GPIO_PORTA(4)'

diff --git a/hw/bsp/p-nucleo-wb55-usbdongle/syscfg.yml b/hw/bsp/p-nucleo-wb55-usbdongle/syscfg.yml
@@ -82,6 +82,7 @@ syscfg.vals:
     TIMER_0_TIM: 'TIM2'
     TIMER_1_TIM: 'TIM16'
     TIMER_2_TIM: 'TIM17'
+    WATCHDOG_INTERVAL: 28000
 
     # Flasher parameters
     MYNEWT_DOWNLOADER: stflash

diff --git a/hw/bsp/p-nucleo-wb55/syscfg.yml b/hw/bsp/p-nucleo-wb55/syscfg.yml
@@ -69,6 +69,7 @@ syscfg.vals:
     TIMER_0_TIM: 'TIM2'
     TIMER_1_TIM: 'TIM16'
     TIMER_2_TIM: 'TIM17'
+    WATCHDOG_INTERVAL: 28000
 
     # Flasher parameters
     MYNEWT_DOWNLOADER: stflash

diff --git a/hw/bsp/stm32f3discovery/syscfg.yml b/hw/bsp/stm32f3discovery/syscfg.yml
@@ -50,6 +50,7 @@ syscfg.vals:
     STM32_CLOCK_APB2_DIVIDER: 'RCC_HCLK_DIV1'
     STM32_FLASH_LATENCY: 'FLASH_LATENCY_2'
     STM32_FLASH_PREFETCH_ENABLE: 1
+    WATCHDOG_INTERVAL: 22000
     UART_0_PIN_TX: 'MCU_GPIO_PORTA(9)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTA(10)'
     SPI_0_PIN_SS: 'MCU_GPIO_PORTA(4)'

diff --git a/hw/bsp/stm32f411discovery/syscfg.yml b/hw/bsp/stm32f411discovery/syscfg.yml
@@ -49,6 +49,7 @@ syscfg.vals:
     STM32_FLASH_PREFETCH_ENABLE: 1
     STM32_INSTRUCTION_CACHE_ENABLE: 1
     STM32_DATA_CACHE_ENABLE: 1
+    WATCHDOG_INTERVAL: 28000
     UART_0_PIN_TX: 'MCU_GPIO_PORTA(2)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTA(3)'
     UART_1_PIN_TX: 'MCU_GPIO_PORTA(9)'

diff --git a/hw/bsp/stm32f429discovery/syscfg.yml b/hw/bsp/stm32f429discovery/syscfg.yml
@@ -49,6 +49,7 @@ syscfg.vals:
     STM32_FLASH_PREFETCH_ENABLE: 1
     STM32_INSTRUCTION_CACHE_ENABLE: 1
     STM32_DATA_CACHE_ENABLE: 1
+    WATCHDOG_INTERVAL: 28000
     UART_0_PIN_TX: 'MCU_GPIO_PORTA(9)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTA(10)'
     TIMER_0_TIM: 'TIM9'

diff --git a/hw/bsp/stm32f4discovery/syscfg.yml b/hw/bsp/stm32f4discovery/syscfg.yml
@@ -49,6 +49,7 @@ syscfg.vals:
     STM32_FLASH_PREFETCH_ENABLE: 1
     STM32_INSTRUCTION_CACHE_ENABLE: 1
     STM32_DATA_CACHE_ENABLE: 1
+    WATCHDOG_INTERVAL: 28000
     UART_0_PIN_TX: 'MCU_GPIO_PORTC(6)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTC(7)'
     UART_1_PIN_TX: 'MCU_GPIO_PORTA(2)'

diff --git a/hw/bsp/stm32f7discovery/syscfg.yml b/hw/bsp/stm32f7discovery/syscfg.yml
@@ -46,6 +46,7 @@ syscfg.vals:
     STM32_FLASH_LATENCY: 'FLASH_LATENCY_7'
     STM32_FLASH_PREFETCH_ENABLE: 1
     STM32_ART_ACCLERATOR_ENABLE: 1
+    WATCHDOG_INTERVAL: 28000
     UART_0_PIN_TX: 'MCU_GPIO_PORTA(9)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTB(7)'
     TIMER_0_TIM: 'TIM1'

diff --git a/hw/bsp/stm32l152discovery/syscfg.yml b/hw/bsp/stm32l152discovery/syscfg.yml
@@ -45,6 +45,7 @@ syscfg.vals:
     STM32_CLOCK_APB2_DIVIDER: 'RCC_HCLK_DIV1'
     STM32_FLASH_LATENCY: 1  # max 32MHz
     STM32_FLASH_PREFETCH_ENABLE: 0
+    WATCHDOG_INTERVAL: 25000
     UART_0_PIN_TX: 'MCU_GPIO_PORTB(10)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTB(11)'
     SPI_1_PIN_SS: 'MCU_GPIO_PORTB(12)'

diff --git a/hw/bsp/weact_g431cb/syscfg.yml b/hw/bsp/weact_g431cb/syscfg.yml
@@ -52,6 +52,7 @@ syscfg.vals:
     STM32_CLOCK_APB4_DIVIDER: 'RCC_HCLK_DIV1'
     STM32_CLOCK_PLLRGE: 'RCC_PLLVCIRANGE_0'
     STM32_FLASH_LATENCY: 'FLASH_LATENCY_4'
+    WATCHDOG_INTERVAL: 28000
     UART_0_PIN_TX: 'MCU_GPIO_PORTA(9)'
     UART_0_PIN_RX: 'MCU_GPIO_PORTA(10)'
     UART_1_PIN_TX: 'MCU_GPIO_PORTA(2)'

diff --git a/hw/mcu/stm/stm32_common/src/hal_watchdog.c b/hw/mcu/stm/stm32_common/src/hal_watchdog.c
@@ -23,6 +23,11 @@
 
 IWDG_HandleTypeDef g_wdt_cfg;
 
+#if MYNEWT_VAL(WATCHDOG_INTERVAL) > 0
+_Static_assert(4095 * 2560 / 11 / (LSI_VALUE / 1000) >= MYNEWT_VAL(WATCHDOG_INTERVAL),
+    "Watchdog interval out of range, decrease value WATCHDOG_INTERVAL in syscfg.yml");
+#endif
+
 int
 hal_watchdog_init(uint32_t expire_msecs)
 {