• 👋 Hi, I’m Leon Woestenberg, a systems architect for software, SoC, FPGA, video, edge, embedded, IoT, datacenters.
• ✨ I'm designing with C, SystemVerilog, SpinalHDL, formal verification, Vivado, Quartus, RISC-V, etc.
• 👀 I’m interested in highest throughput, ultra low latency, lowest power, algorithms and protocols.
• 🌱 I’m currently learning Scala and SpinalHDL for a large FPGA chip design.
• 💞️ I’m collaborating in open-source projects that I use (OpenEmbedded, Yocto, Linux, ChibiOS, SpinalHDL, lwIP, ...)
• 📫 How to reach me, see www.sidebranch.com.