…2 to GPRRegClass for RV64.

This is an alternative fix for llvm#81192. This allows the SelectionDAG
scheduler to be able to find a register class for i32 on RV64. The
default implementation of findRepresentativeClass only works for
legal types which i32 is not for RV64.

I wanted to remove i32 from the GPR register class to fix the issue,
but we need to be able to write some i32 patterns for GISel. And now
it looks like I need to add i16 to GPR. I had tried to use manual
instruction selection for some cases in GISel in llvm#116111, but I got
some feedback recommending the use of patterns.

I did some investigation of why tablegen uses i32 in output patterns
on RV64. It appears it comes down to ForceArbitraryInstResultType
that just picks a type for the output pattern when the isel pattern
isn't specific enough. I believe it picks the smallest type(lowested
numbered) to resolve the conflict.

…ling base class with XLenVT.