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[rtl] fix a typo. #2212

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Aug 28, 2024
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[rtl] fix a typo. #2212

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2 changes: 1 addition & 1 deletion rtl/ibex_core.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -1678,7 +1678,7 @@ module ibex_core import ibex_pkg::*; #(
end


// Memory adddress/write data available first cycle of ld/st instruction from register read
// Memory address/write data available first cycle of ld/st instruction from register read
always_comb begin
if (instr_first_cycle_id) begin
rvfi_mem_addr_d = alu_adder_result_ex;
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