Fix SATP mode WARL behaviour

SATP mode WARL behaviour is different other WARL fields -- if a write of
mode is not recognised, the entire write is ignored. This is used in
Linux to detect SV48 support, so it's important to implement the
semantics correctly.

Signed-off-by: Gary Guo <gary@garyguo.net>

ip/pipeline/rtl/muntjac_cs_registers.sv

@@ -597,9 +597,16 @@ module muntjac_cs_registers import muntjac_pkg::*; # (
               if (mideleg_q.irq_software_s) ssip_d = csr_wdata_int[CSR_SSIX_BIT];
             end
             CSR_SATP: begin
-              satp_mode_d = csr_wdata_int[63];
-              satp_asid_d = csr_wdata_int[44 +: AsidLen];
-              satp_ppn_d  = csr_wdata_int[0 +: PhysAddrLen-12];
+              unique case (csr_wdata_int[63:60])
+                SATP_MODE_BARE, SATP_MODE_SV39: begin
+                  satp_mode_d = csr_wdata_int[63];
+                  satp_asid_d = csr_wdata_int[44 +: AsidLen];
+                  satp_ppn_d  = csr_wdata_int[0 +: PhysAddrLen-12];
+                end
+                // When we cannot recongise the mode register, entire CSR
+                // write needs to be ignored.
+                default:;
+              endcase
             end
 
             CSR_MSTATUS: begin

ip/pipeline/rtl/muntjac_pkg.sv

@@ -229,6 +229,12 @@ typedef enum logic [1:0] {
   PRIV_LVL_U = 2'b00
 } priv_lvl_e;
 
+// SATP mode
+typedef enum logic [3:0] {
+  SATP_MODE_BARE = 4'd0,
+  SATP_MODE_SV39 = 4'd8
+} satp_mode_e;
+
 // Status register
 typedef struct packed {
   logic tsr;