[opentitanlib] Bindgen rom_error_t into Rust

Signed-off-by: Chris Frantz <cfrantz@google.com>
(cherry picked from commit 5ecb3fb)
(cherry picked from commit 3837b32)

sw/host/opentitanlib/BUILD

@@ -82,6 +82,7 @@ rust_library(
         "src/chip/boot_log.rs",
         "src/chip/boot_svc.rs",
         "src/chip/helper.rs",
+        "src/chip/rom_error.rs",
         "src/chip/mod.rs",
         "src/console/mod.rs",
         "src/console/spi.rs",
@@ -259,6 +260,7 @@ rust_library(
         "//third_party/openocd:jtag_cmsis_dap_adapter_cfg",
         "//util/openocd/target:lowrisc-earlgrey.cfg",
         "//util/openocd/target:lowrisc-earlgrey-lc.cfg",
+        "//sw/host/opentitanlib/bindgen:rom_error_enum",
     ],
     crate_features = [
         "include_hyperdebug_firmware",
@@ -275,6 +277,7 @@ rust_library(
         "i2c_target": "$(location :i2c_target)",
         "mem": "$(location :mem)",
         "pinmux_config": "$(location :pinmux_config)",
+        "rom_error_enum": "$(location //sw/host/opentitanlib/bindgen:rom_error_enum)",
         "spi_passthru": "$(location :spi_passthru)",
         "ottf": "$(location :ottf)",
         "hyperdebug_firmware": "$(location @hyperdebug_firmware//:hyperdebug/ec.bin)",

sw/host/opentitanlib/bindgen/BUILD

@@ -2,8 +2,8 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
-load("@rules_rust//bindgen:defs.bzl", "rust_bindgen_library")
-load("@rules_rust//rust:defs.bzl", "rust_library")
+load("@rules_rust//rust:defs.bzl", "rust_library", "rust_test")
+load("@rules_rust//bindgen:defs.bzl", "rust_bindgen", "rust_bindgen_library")
 
 package(default_visibility = ["//visibility:public"])
 
@@ -187,6 +187,43 @@ rust_bindgen_library(
     ],
 )
 
+# We generate the bindgen source for rom_error_t so we can post-process it
+# with the :rom_error_enum rule and build a full enum from all known
+# rom_error_t values.
+rust_bindgen(
+    name = "rom_error",
+    bindgen_flags = [
+        "--allowlist-type=rom_error_t",
+    ],
+    cc_lib = "//sw/device/silicon_creator/lib:error",
+    header = "//sw/device/silicon_creator/lib:error.h",
+)
+
+# Generate a rust source file that contains the enum definition.  This
+# will get textual-included into opentitanlib's `chip::rom_error` module.
+genrule(
+    name = "rom_error_enum",
+    srcs = [":rom_error"],
+    outs = ["rom_error_enum.rs"],
+    cmd = """
+cat >$@ <<HEADER
+with_unknown! {
+    pub enum RomError: u32 [default = Self::Unknown] {
+HEADER
+
+# The sed expression creates enumerators with idiomatic Rust names that
+# refer to the bindgen'ed constants.
+cat $(location :rom_error) \\
+    | grep const \\
+    | sed -E 's/^pub const (rom_error_kError([^:]+)).*$$/        \\2 = bindgen::rom_error::\\1,/g' >>$@
+
+cat >>$@ <<FOOTER
+    }
+}
+FOOTER
+    """,
+)
+
 rust_bindgen_library(
     name = "sram_program",
     bindgen_flags = [
@@ -248,7 +285,10 @@ rust_bindgen_library(
 
 rust_library(
     name = "bindgen",
-    srcs = ["lib.rs"],
+    srcs = [
+        "lib.rs",
+        ":rom_error",
+    ],
     deps = [
         ":alert",
         ":dif",

sw/host/opentitanlib/bindgen/lib.rs

@@ -10,3 +10,8 @@ pub use multibits;
 pub use sram_program;
 pub use status;
 pub use test_status;
+
+#[allow(non_snake_case)]
+#[allow(non_upper_case_globals)]
+#[allow(non_camel_case_types)]
+pub mod rom_error;

sw/host/opentitanlib/bindgen/rom_error.rs

@@ -0,0 +1,7 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+// Note: The real `rom_error.rs` source file is automatically generated by
+// the rom_error rule in the BUILD file.  This file exists to prevent rustfmt
+// from complaining that the source file doesn't exist.

sw/host/opentitanlib/src/chip/boot_svc.rs

@@ -12,6 +12,7 @@ use std::io::{Read, Write};
 
 use super::ChipDataError;
 use crate::chip::boolean::HardenedBool;
+use crate::chip::rom_error::RomError;
 use crate::crypto::ecdsa::{EcdsaPrivateKey, EcdsaPublicKey, EcdsaRawPublicKey, EcdsaRawSignature};
 use crate::with_unknown;
 
@@ -87,7 +88,7 @@ pub struct MinBl0SecVerResponse {
     pub ver: u32,
     /// The status response to the request.
     #[annotate(format = hex)]
-    pub status: u32,
+    pub status: RomError,
 }
 
 /// Request to set the next (one-time) owner stage boot slot.
@@ -104,7 +105,7 @@ pub struct NextBl0SlotRequest {
 pub struct NextBl0SlotResponse {
     /// The status response to the request.
     #[annotate(format = hex)]
-    pub status: u32,
+    pub status: RomError,
     /// The current primary slot.
     pub primary_bl0_slot: BootSlot,
 }
@@ -132,7 +133,7 @@ pub struct OwnershipUnlockRequest {
 pub struct OwnershipUnlockResponse {
     /// The status response to the request.
     #[annotate(format = hex)]
-    pub status: u32,
+    pub status: RomError,
 }
 
 /// Request to activate ownership of the chip.
@@ -158,7 +159,7 @@ pub struct OwnershipActivateRequest {
 pub struct OwnershipActivateResponse {
     /// The status response to the request.
     #[annotate(format = hex)]
-    pub status: u32,
+    pub status: RomError,
 }
 
 #[derive(Debug, Serialize, Annotate)]
@@ -377,15 +378,15 @@ impl TryFrom<&[u8]> for MinBl0SecVerResponse {
         let mut reader = std::io::Cursor::new(buf);
         Ok(MinBl0SecVerResponse {
             ver: reader.read_u32::<LittleEndian>()?,
-            status: reader.read_u32::<LittleEndian>()?,
+            status: RomError(reader.read_u32::<LittleEndian>()?),
         })
     }
 }
 impl MinBl0SecVerResponse {
     pub const SIZE: usize = 8;
     pub fn write(&self, dest: &mut impl Write) -> Result<()> {
         dest.write_u32::<LittleEndian>(self.ver)?;
-        dest.write_u32::<LittleEndian>(self.status)?;
+        dest.write_u32::<LittleEndian>(u32::from(self.status))?;
         Ok(())
     }
 }
@@ -414,16 +415,15 @@ impl TryFrom<&[u8]> for NextBl0SlotResponse {
     fn try_from(buf: &[u8]) -> std::result::Result<Self, Self::Error> {
         let mut reader = std::io::Cursor::new(buf);
         Ok(NextBl0SlotResponse {
-            status: reader.read_u32::<LittleEndian>()?,
+            status: RomError(reader.read_u32::<LittleEndian>()?),
             primary_bl0_slot: BootSlot(reader.read_u32::<LittleEndian>()?),
         })
     }
 }
 impl NextBl0SlotResponse {
     pub const SIZE: usize = 4;
     pub fn write(&self, dest: &mut impl Write) -> Result<()> {
-        dest.write_u32::<LittleEndian>(self.status)?;
-        dest.write_u32::<LittleEndian>(u32::from(self.primary_bl0_slot))?;
+        dest.write_u32::<LittleEndian>(u32::from(self.status))?;
         Ok(())
     }
 }
@@ -476,14 +476,14 @@ impl TryFrom<&[u8]> for OwnershipUnlockResponse {
     fn try_from(buf: &[u8]) -> std::result::Result<Self, Self::Error> {
         let mut reader = std::io::Cursor::new(buf);
         Ok(OwnershipUnlockResponse {
-            status: reader.read_u32::<LittleEndian>()?,
+            status: RomError(reader.read_u32::<LittleEndian>()?),
         })
     }
 }
 impl OwnershipUnlockResponse {
     pub const SIZE: usize = 4;
     pub fn write(&self, dest: &mut impl Write) -> Result<()> {
-        dest.write_u32::<LittleEndian>(self.status)?;
+        dest.write_u32::<LittleEndian>(u32::from(self.status))?;
         Ok(())
     }
 }
@@ -531,14 +531,14 @@ impl TryFrom<&[u8]> for OwnershipActivateResponse {
     fn try_from(buf: &[u8]) -> std::result::Result<Self, Self::Error> {
         let mut reader = std::io::Cursor::new(buf);
         Ok(OwnershipActivateResponse {
-            status: reader.read_u32::<LittleEndian>()?,
+            status: RomError(reader.read_u32::<LittleEndian>()?),
         })
     }
 }
 impl OwnershipActivateResponse {
     pub const SIZE: usize = 4;
     pub fn write(&self, dest: &mut impl Write) -> Result<()> {
-        dest.write_u32::<LittleEndian>(self.status)?;
+        dest.write_u32::<LittleEndian>(u32::from(self.status))?;
         Ok(())
     }
 }

sw/host/opentitanlib/src/chip/mod.rs

@@ -10,6 +10,7 @@ pub mod boolean;
 pub mod boot_log;
 pub mod boot_svc;
 pub mod helper;
+pub mod rom_error;
 
 #[derive(Debug, Error)]
 pub enum ChipDataError {

sw/host/opentitanlib/src/chip/rom_error.rs

@@ -0,0 +1,7 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use crate::with_unknown;
+
+include!(env!("rom_error_enum"));

sw/host/opentitanlib/src/ownership/misc.rs

@@ -72,6 +72,7 @@ impl TlvHeader {
 
 /// Low-level key material (ie: bit representation).
 #[derive(Debug, Serialize, Deserialize)]
+#[allow(clippy::len_without_is_empty)]
 pub enum KeyMaterial {
     Unknown(Vec<u8>),
     Ecdsa(#[serde(deserialize_with = "string_or_struct")] EcdsaRawPublicKey),