[dv] Enable logging to file in uart_logger

Signed-off-by: Srikrishna Iyer <sriyer@google.com>

hw/dv/sv/uart_agent/uart_agent_cfg.sv

@@ -17,9 +17,10 @@ class uart_agent_cfg extends dv_base_agent_cfg;
   bit odd_parity;
 
   // Logger settings.
-  bit en_logger         = 1'b0; // enable logger on tx
-  bit use_rx_for_logger = 1'b0; // use rx instead of tx
-  string logger_msg_id  = "UART_LOGGER";
+  bit en_logger           = 1'b0; // enable logger on tx
+  bit use_rx_for_logger   = 1'b0; // use rx instead of tx
+  string logger_id        = "uart_logger";
+  bit write_logs_to_file  = 1'b1;
 
   // reset is controlled at upper seq-level as no reset pin on uart interface
   bit under_reset;

hw/dv/sv/uart_agent/uart_logger.sv

@@ -5,6 +5,8 @@
 class uart_logger extends uvm_component;
   `uvm_component_utils(uart_logger)
 
+  int logs_output_fd = 0;
+
   uart_agent_cfg cfg;
   uvm_tlm_analysis_fifo #(uart_item) log_item_fifo;
 
@@ -15,9 +17,16 @@ class uart_logger extends uvm_component;
   endfunction
 
   virtual task run_phase(uvm_phase phase);
+    if (cfg.write_logs_to_file) begin
+      logs_output_fd = $fopen({cfg.logger_id, ".log"}, "w");
+    end
     capture_logs();
   endtask
 
+  virtual function void final_phase(uvm_phase phase);
+    if (logs_output_fd) $fclose(logs_output_fd);
+  endfunction
+
   // Captures bytes received from UART TX port and constructs the logs for printing.
   virtual task capture_logs();
     uart_item item;
@@ -30,7 +39,7 @@ class uart_logger extends uvm_component;
       forever begin
         log_item_fifo.get(item);
         char = string'(item.data);
-        `uvm_info(cfg.logger_msg_id, $sformatf("received char: %0s", char), UVM_DEBUG)
+        `uvm_info(cfg.logger_id, $sformatf("received char: %0s", char), UVM_DEBUG)
         // Continue concatenating chars into the log string untl lf or cr is encountered.
         if (item.data inside {lf, cr}) begin
           print_log(log);
@@ -60,21 +69,24 @@ class uart_logger extends uvm_component;
     if (log == "") return;
     case (1)
       (!uvm_re_match(info, log)): begin
-        `uvm_info(cfg.logger_msg_id, log.substr(info.len() - 1, log.len() - 1), UVM_LOW)
+        `uvm_info(cfg.logger_id, log.substr(info.len() - 1, log.len() - 1), UVM_LOW)
       end
       (!uvm_re_match(warn, log)): begin
-        `uvm_warning(cfg.logger_msg_id, log.substr(warn.len() - 1, log.len() - 1))
+        `uvm_warning(cfg.logger_id, log.substr(warn.len() - 1, log.len() - 1))
       end
       (!uvm_re_match(error, log)): begin
-        `uvm_error(cfg.logger_msg_id, log.substr(error.len() - 1, log.len() - 1))
+        `uvm_error(cfg.logger_id, log.substr(error.len() - 1, log.len() - 1))
       end
       (!uvm_re_match(fatal, log)): begin
-        `uvm_fatal(cfg.logger_msg_id, log.substr(fatal.len() - 1, log.len() - 1))
+        `uvm_fatal(cfg.logger_id, log.substr(fatal.len() - 1, log.len() - 1))
       end
       default: begin
-        `uvm_info(cfg.logger_msg_id, log, UVM_LOW)
+        `uvm_info(cfg.logger_id, log, UVM_LOW)
       end
     endcase
+    if (logs_output_fd) begin
+      $fwrite(logs_output_fd, "[%15t]: %0s\n", $time, log);
+    end
   endfunction
 
 endclass

hw/top_earlgrey/dv/tests/chip_base_test.sv

@@ -26,10 +26,13 @@ class chip_base_test extends cip_base_test #(
     // Knob to set the UART baud rate (set to 2M by default).
     void'($value$plusargs("uart_baud_rate=%0d", cfg.uart_baud_rate));
 
+    // Knob to configure writing sw logs to a separate file (enabled by default).
+    void'($value$plusargs("write_sw_logs_to_file=%0b", cfg.write_sw_logs_to_file));
+
     // Knob to enable logging over UART (disabled by default).
     void'($value$plusargs("en_uart_logger=%0b", cfg.en_uart_logger));
     cfg.m_uart_agent_cfg.en_logger = cfg.en_uart_logger;
-    cfg.m_uart_agent_cfg.logger_msg_id  = "SW_LOGS";
+    cfg.m_uart_agent_cfg.write_logs_to_file = cfg.write_sw_logs_to_file;
 
     // Knob to set the sw_test_timeout_ns (set to 5ms by default).
     void'($value$plusargs("sw_test_timeout_ns=%0d", cfg.sw_test_timeout_ns));