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[rv_core_ibex] Re-venor Ibex #20890

Merged
merged 3 commits into from
Jan 19, 2024
Merged

[rv_core_ibex] Re-venor Ibex #20890

merged 3 commits into from
Jan 19, 2024

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msfschaffner
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@msfschaffner msfschaffner commented Jan 19, 2024

This will fix #20788

Update code from upstream repository
https://github.com/lowRISC/ibex.git to revision
56413ecf103342fb7d53c31f182ac930209267df

* [icache] Disable S&P diffusion layer in memory scrambling (Michael
  Schaffner)
* [dv] Fix paths in `merge_cov.py` (Sᴜᴘᴇʀ Lᴇᴇ)
* Tweak questa timescale argument (Harry Callahan)
* Fixup the questa build/sim command templates in rtl_simulation.yaml
  (Harry Callahan)
* [rtl] Fix FI vulnerability in RF (Pascal Nasahl)
* [doc] Update cosim version (Pascal Nasahl)
* [util] Update check_tool_requirements.py (Gary Guo)
* [rtl] Avoid name collision in ibex_pmp.sv (Rupert Swarbrick)
* [dv] Fix performance counter printing in simple system (Rupert
  Swarbrick)
* Fix spelling of separator (Rupert Swarbrick)
* [dv] Add an extra key to common_project_cfg.hjson (Rupert Swarbrick)
* [verilator] Slight refactor in ibex_tracer to avoid BLKSEQ warning
  (Rupert Swarbrick)
* [verilator] Waive MULTIDRIVEN warning in ibex_tracer.sv (Rupert
  Swarbrick)
* [ibex_pmp/lint] Declare functions before using them (Michael
  Schaffner)
* Update google_riscv-dv to chipsalliance/riscv-dv@71666eb (Greg
  Chadwick)
* [dv] Fix ibex_cmd.py (Greg Chadwick)
* Port directed_test_schema.py to recent versions of Pydantic (Rupert
  Swarbrick)
* Tweak ibex_cmd.py to fail more cleanly (Rupert Swarbrick)
* Remove (empty) Verible waiver file (Rupert Swarbrick)
* [doc] Fix background of Icache block (Marno van der Maas)
* [doc] Fix background in block diagram (Marno van der Maas)
* Update google_riscv-dv to chipsalliance/riscv-dv@08b1206 (Marno van
  der Maas)
* [dv,doc] Point reference to lowRISC branch (Marno van der Maas)
* [dv] Move DVSIM data structures (Marno van der Maas)
* [dv] Add common_ifs_pkg.sv to DV files (Marno van der Maas)
* [doc] Fix documented mstatus reset value (Greg Chadwick)
* [dv] New directed test to cover some scenarios with U-mode execution
  (Greg Chadwick)
* [dv] Fix SET_PMP_CFG macro used by directed tests (Greg Chadwick)
* [dv,fcov] Add additional illegal bins to PMP fcov (Greg Chadwick)
* [dv, fcov] Increase iterations of riscv_mem_intg_error_test (Greg
  Chadwick)
* Use correct format string for $value$plusargs (Rupert Swarbrick)
* Reorder classes in ibex_debug_triggers_overrides.sv (Rupert
  Swarbrick)
* Express some coverpoint crosses in an equivalent way (Rupert
  Swarbrick)
* Drop an import from inside of a class (Rupert Swarbrick)
* Re-export imported symbols from ibex_mem_intf_pkg (Rupert Swarbrick)
* Bump Spike minimum version (Rupert Swarbrick)
* Correct type in scripts_lib.py's run_one (Rupert Swarbrick)
* [dv] Add asserts to check alerts for memory integrity failures (Greg
  Chadwick)
* Drop a double entry in rtl_simulation.yaml (Rupert Swarbrick)

Signed-off-by: Michael Schaffner <msf@opentitan.org>
Signed-off-by: Michael Schaffner <msf@opentitan.org>
@msfschaffner msfschaffner requested a review from a team as a code owner January 19, 2024 04:36
@msfschaffner msfschaffner requested review from jdonjdon and removed request for a team January 19, 2024 04:36
@msfschaffner msfschaffner changed the title Vendor ibex [rv_core_ibex] Re-venor Ibex Jan 19, 2024
@msfschaffner msfschaffner linked an issue Jan 19, 2024 that may be closed by this pull request
@msfschaffner msfschaffner self-assigned this Jan 19, 2024
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This looks sensible to me. Other people might notice the line count diff as I did. But it's not as dramatic as it looks.

  • The are some small RTL changes
  • There are some UVM changes in dv/uvm/core_ibex
  • There's a whopping load of code that we "double vendor" from riscv-dv, which has changed.

I don't know why we have this ugly nested vendoring structure, but I just looked and it's due to me back in April 2022(!) Long term, maybe we can get rid of the silliness, but it's definitely not a problem for this PR.

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LGTM!

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vogelpi commented Jan 19, 2024

This supersedes #20850 and is thus also takes care of #20715. I was thinking to also include another RTL improvement for the lockstep comparison enable (see #20779) but fixing this inside Ibex related in some tooling challenges. We'll thus do another vendor PR to get the lockstep comparison enable improvement.

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vogelpi commented Jan 19, 2024

Hm, most likely this PR also misses an update to the hw/ip/rv_core_ibex/lint/rv_core_ibex.waiver file. I'll include the fix in this PR.

Signed-off-by: Pirmin Vogel <vogelpi@lowrisc.org>
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vogelpi commented Jan 19, 2024

Update: I've pushed the AscentLint waiver update and will merge this PR once Kokore succeeds. Everything else successfully passed the CI pipeline before.

@vogelpi vogelpi merged commit b2e29a5 into lowRISC:master Jan 19, 2024
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@msfschaffner
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Thanks for pushing this through, @vogelpi!

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RFC: Removing the S&P Layer in Scrambling for Top Earl Grey
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