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Attempt to reduce the depth of xbar logic on critical timing paths to/from the HyperRAM/SRAM by moving most peripherals from the main cross-bar to a new "peri" (peripheral) sub-crossbar. Keeps addresses the same, but some few devices have increased access latency due to being moved to xbar_peri or to improve QoR. Blocks with increased access latency: timer, system_info, & hw_rev. Blocks with decreased access latency: plic.
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