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At the moment there is no graceful way to exit the simulator. Our CI essentially waits for content in the UART log file and then the process is killed. It would be nice to have a better way of doing this.
After some discussions, it may be better to have a special UART sequence to exit the simulator to avoid having unnecessary differences between FPGA and simulation.
At the moment there is no graceful way to exit the simulator. Our CI essentially waits for content in the UART log file and then the process is killed. It would be nice to have a better way of doing this.
One way of doing this is implementing simulation control like we do in Ibex demo system: https://github.com/lowRISC/ibex-demo-system/blob/a1201cf2b99f8f4149c0971c04c655adbf1753c4/rtl/system/ibex_demo_system.sv#L404-L419
Anyone have any particular opinions on the best way of doing this?
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