Add support for Sonata PCB #17
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HU90m
approved these changes
Jan 22, 2024
This commit assumes revision 0.2 of the board. It adds a pin file, a top level module, a clock generator and the appropriate changes to the core file. It also updates the getting started guide to use the Sonata PCB by default. This commit is derived from a commit in the demo system: lowRISC/ibex-demo-system@d9ec0d0 With the following changes: - Remove the JTAG pins from the top and the XDC file since Sonata does not have a debug module yet. - Rename the pins to match the names in the PCB documentation.
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In the last force push, I renamed the signals in the XDC to match the PCB specification as suggested by @alees24. I also removed the JTAG signals as these are currently not used in the Sonata system while the debug module is missing. |
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This commit assumes revision 0.2 of the board. It adds a pin file, a top level module, a clock generator and the appropriate changes to the core file. It also updates the getting started guide to use the Sonata PCB by default.
This commit is derived from a PR in the demo system: lowRISC/ibex-demo-system#86