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Adding gicv2m model (#67)
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SimonWin authored Oct 11, 2023
1 parent fa32f91 commit e117b00
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Showing 6 changed files with 137 additions and 7 deletions.
1 change: 1 addition & 0 deletions CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -172,6 +172,7 @@ add_library(vcml STATIC
${src}/vcml/models/arm/pl190vic.cpp
${src}/vcml/models/arm/syscon.cpp
${src}/vcml/models/arm/gic400.cpp
${src}/vcml/models/arm/gicv2m.cpp
${src}/vcml/models/riscv/clint.cpp
${src}/vcml/models/riscv/plic.cpp
${src}/vcml/models/riscv/aclint.cpp
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1 change: 1 addition & 0 deletions include/vcml.h
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Expand Up @@ -136,6 +136,7 @@
#include "vcml/models/arm/pl190vic.h"
#include "vcml/models/arm/syscon.h"
#include "vcml/models/arm/gic400.h"
#include "vcml/models/arm/gicv2m.h"

#include "vcml/models/riscv/clint.h"
#include "vcml/models/riscv/plic.h"
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8 changes: 2 additions & 6 deletions include/vcml/models/arm/gic400.h
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Expand Up @@ -8,8 +8,8 @@
* *
******************************************************************************/

#ifndef AVP_ARM_GIC400_H
#define AVP_ARM_GIC400_H
#ifndef VCML_ARM_GIC400_H
#define VCML_ARM_GIC400_H

#include "vcml/core/types.h"
#include "vcml/core/systemc.h"
Expand Down Expand Up @@ -198,8 +198,6 @@ class gic400 : public peripheral
virtual void reset() override;
virtual void end_of_elaboration() override;

void setup(unsigned int num_cpu, unsigned int num_irq);

void set_sgi_pending(u8 value, unsigned int sgi, unsigned int cpu,
bool set);
};
Expand Down Expand Up @@ -377,8 +375,6 @@ class gic400 : public peripheral
void set_irq_trigger(unsigned int irq, trigger_mode t);
void set_irq_signaled(unsigned int irq, bool signaled, unsigned int m);
bool irq_signaled(unsigned int irq, unsigned int mask);
bool is_edge_triggered(unsigned int irq) const;
bool is_level_triggered(unsigned int irq) const;

bool test_pending(unsigned int irq, unsigned int mask);

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73 changes: 73 additions & 0 deletions include/vcml/models/arm/gicv2m.h
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@@ -0,0 +1,73 @@
/******************************************************************************
* *
* Copyright (C) 2023 MachineWare GmbH *
* All Rights Reserved *
* *
* This is work is licensed under the terms described in the LICENSE file *
* found in the root directory of this source tree. *
* *
******************************************************************************/

#ifndef VCML_ARM_GICV2M_H
#define VCML_ARM_GICV2M_H

#include "vcml/core/types.h"
#include "vcml/core/systemc.h"
#include "vcml/core/range.h"
#include "vcml/core/model.h"
#include "vcml/core/peripheral.h"

#include "vcml/protocols/tlm.h"
#include "vcml/protocols/gpio.h"

namespace vcml {
namespace arm {

class gicv2m : public peripheral
{
private:
void write_setspi(u32 val);

u32 read_typer();

// disabled
gicv2m();
gicv2m(const gicv2m&);

public:
enum gicv2m_consts : size_t {
PROD_ID = 'M',
ARCH_VER = 0,
IMPLEMENTER = 0,
};

enum reg_addr : size_t {
TYPER_ADDR = 0x008,
SETSPI_ADDR = 0x040,
IIDR_ADDR = 0xfcc,
};

property<size_t> base_spi;
property<size_t> num_spi;

typedef field<16, 10> TYPER_BASE_SPI;
typedef field<0, 10> TYPER_NUM_SPI;
typedef field<0, 10> SETSPI_SPI;

reg<u32> typer; // MSI Type register
reg<u32> setspi; // Set SPI register
reg<u32> iidr; // Interface Identification register

gpio_initiator_array out;

tlm_target_socket in;

gicv2m(const sc_module_name& nm);
virtual ~gicv2m();
VCML_KIND(arm::gicv2m);
};

} // namespace arm
} // namespace vcml

#endif
59 changes: 59 additions & 0 deletions src/vcml/models/arm/gicv2m.cpp
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@@ -0,0 +1,59 @@
/******************************************************************************
* *
* Copyright (C) 2023 MachineWare GmbH *
* All Rights Reserved *
* *
* This is work is licensed under the terms described in the LICENSE file *
* found in the root directory of this source tree. *
* *
******************************************************************************/

#include "vcml/models/arm/gicv2m.h"

namespace vcml {
namespace arm {

void gicv2m::write_setspi(u32 val) {
val &= SETSPI_SPI::MASK;
if (val >= base_spi && val < base_spi + num_spi)
out[val].pulse();
}

u32 gicv2m::read_typer() {
return TYPER_BASE_SPI::set(base_spi) | TYPER_NUM_SPI::set(num_spi);
}

gicv2m::gicv2m(const sc_module_name& nm):
peripheral(nm),
base_spi("base_spi", 64),
num_spi("num_spi", 64),
typer("typer", TYPER_ADDR),
setspi("setspi", SETSPI_ADDR),
iidr("iidr", IIDR_ADDR, PROD_ID << 20 | ARCH_VER << 16 | IMPLEMENTER),
out("out"),
in("in") {
if (base_spi > TYPER_BASE_SPI())
VCML_ERROR("base_spi property out of range: %zu", base_spi.get());

if (num_spi > TYPER_NUM_SPI())
VCML_ERROR("num_spi property out of range: %zu", num_spi.get());

typer.allow_read_only();
typer.on_read(&gicv2m::read_typer);

setspi.allow_write_only();
setspi.on_write(&gicv2m::write_setspi);

iidr.allow_read_only();
}

gicv2m::~gicv2m() {
// nothing to do
}

VCML_EXPORT_MODEL(vcml::arm::gicv2m, name, args) {
return new gicv2m(name);
}

} // namespace arm
} // namespace vcml
2 changes: 1 addition & 1 deletion src/vcml/protocols/virtio.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -134,7 +134,7 @@ virtqueue::virtqueue(const virtio_queue_desc& desc, virtio_dmifn dmi):
addr_device(desc.device),
has_event_idx(desc.has_event_idx),
notify(false),
vector(VIRTIO_NO_VECTOR),
vector(desc.vector),
dmi(std::move(dmi)),
parent(hierarchy_search<module>()),
log(this) {
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