Add support for Sonata PCB

This commit assumes revision 0.2 of the board. It adds a pin file, a top
level module, a clock generator and the appropriate changes to the core
file. It also updates the getting started guide to use the Sonata PCB by
default.

This commit is derived from a PR in the demo system:
lowRISC/ibex-demo-system#86

rtl/fpga/top_sonata.sv

@@ -75,7 +75,7 @@ module top_sonata (
     .uart_rx_i(ser0_rx),
     .uart_tx_o(ser0_tx),
 
-    .pwm_o({CheriErr, led_legacy, led_cheri, led_halted}),
+    .pwm_o({cheriErr, led_legacy, led_cheri, led_halted}),
 
     .spi_rx_i (1'b0),
     .spi_tx_o (lcd_copi),