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Signed-off-by: Almir Okato <almir.okato@espressif.com>
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# SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD | ||
# | ||
# SPDX-License-Identifier: Apache-2.0 | ||
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list(APPEND include_dirs | ||
${esp_hal_dir}/components/esp_hw_support/port/${MCUBOOT_TARGET}/private_include | ||
) | ||
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list(APPEND hal_srcs | ||
${esp_hal_dir}/components/hal/cache_hal.c | ||
${esp_hal_dir}/components/efuse/src/efuse_controller/keys/with_key_purposes/esp_efuse_api_key.c | ||
${esp_hal_dir}/components/esp_rom/patches/esp_rom_regi2c_${MCUBOOT_TARGET}.c | ||
) | ||
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if (DEFINED CONFIG_ESP_CONSOLE_UART_CUSTOM) | ||
list(APPEND hal_srcs | ||
${src_dir}/${MCUBOOT_TARGET}/console_uart_custom.c | ||
) | ||
endif() | ||
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list(APPEND LINKER_SCRIPTS | ||
-T${esp_hal_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.newlib.ld | ||
) | ||
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set_source_files_properties( | ||
${esp_hal_dir}/components/bootloader_support/src/esp_image_format.c | ||
${esp_hal_dir}/components/bootloader_support/bootloader_flash/src/bootloader_flash.c | ||
${esp_hal_dir}/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_${MCUBOOT_TARGET}.c | ||
${esp_hal_dir}/components/hal/mmu_hal.c | ||
${esp_hal_dir}/components/hal/cache_hal.c | ||
PROPERTIES COMPILE_FLAGS | ||
"-Wno-logical-op") |
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/* | ||
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD | ||
* | ||
* SPDX-License-Identifier: Apache-2.0 | ||
*/ | ||
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#define BOOTLOADER_BUILD 1 | ||
#define CONFIG_IDF_FIRMWARE_CHIP_ID 0x000D | ||
#define CONFIG_IDF_TARGET_ESP32C6 1 | ||
#define CONFIG_ESP32C6_REV_MIN_0 1 | ||
#define CONFIG_ESP32C6_REV_MIN_FULL 0 | ||
#define CONFIG_ESP_REV_MIN_FULL CONFIG_ESP32C6_REV_MIN_FULL | ||
#define CONFIG_ESP32C6_REV_MIN 0 | ||
#define CONFIG_ESP32C6_REV_MAX_FULL 99 | ||
#define CONFIG_ESP_REV_MAX_FULL CONFIG_ESP32C6_REV_MAX_FULL | ||
#define CONFIG_IDF_TARGET_ARCH_RISCV 1 | ||
#define CONFIG_MMU_PAGE_SIZE 0x10000 | ||
#define SOC_MMU_PAGE_SIZE CONFIG_MMU_PAGE_SIZE /* from soc/CMakeLists */ | ||
#define CONFIG_XTAL_FREQ 40 | ||
#define CONFIG_SPI_FLASH_ROM_DRIVER_PATCH 1 | ||
#define CONFIG_MCUBOOT 1 | ||
#define NDEBUG 1 | ||
#define CONFIG_BOOTLOADER_WDT_TIME_MS 9000 | ||
#define CONFIG_ESP_CONSOLE_UART_BAUDRATE 115200 | ||
#define CONFIG_BOOTLOADER_OFFSET_IN_FLASH 0x0000 | ||
#define CONFIG_PARTITION_TABLE_OFFSET 0x10000 | ||
#define CONFIG_EFUSE_VIRTUAL_OFFSET 0x250000 | ||
#define CONFIG_EFUSE_VIRTUAL_SIZE 0x2000 | ||
#define CONFIG_EFUSE_MAX_BLK_LEN 256 | ||
#define CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT 1 |
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/* | ||
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD | ||
* | ||
* SPDX-License-Identifier: Apache-2.0 | ||
*/ | ||
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#include <esp_rom_uart.h> | ||
#include <hal/uart_ll.h> | ||
#include <soc/uart_periph.h> | ||
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#if CONFIG_ESP_CONSOLE_UART_CUSTOM | ||
static uart_dev_t *alt_console_uart_dev = (CONFIG_ESP_CONSOLE_UART_NUM == 0) ? | ||
&UART0 : | ||
&UART1; | ||
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void IRAM_ATTR esp_rom_uart_putc(char c) | ||
{ | ||
while (uart_ll_get_txfifo_len(alt_console_uart_dev) == 0); | ||
uart_ll_write_txfifo(alt_console_uart_dev, (const uint8_t *) &c, 1); | ||
} | ||
#endif | ||
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# SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD | ||
# | ||
# SPDX-License-Identifier: Apache-2.0 | ||
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CONFIG_ESP_FLASH_SIZE=4MB | ||
CONFIG_ESP_BOOTLOADER_SIZE=0xF000 | ||
CONFIG_ESP_BOOTLOADER_OFFSET=0x0000 | ||
CONFIG_ESP_IMAGE0_PRIMARY_START_ADDRESS=0x10000 | ||
CONFIG_ESP_APPLICATION_SIZE=0x100000 | ||
CONFIG_ESP_IMAGE0_SECONDARY_START_ADDRESS=0x110000 | ||
CONFIG_ESP_MCUBOOT_WDT_ENABLE=y | ||
CONFIG_ESP_SCRATCH_OFFSET=0x210000 | ||
CONFIG_ESP_SCRATCH_SIZE=0x40000 | ||
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# When enabled, prevents updating image to an older version | ||
# CONFIG_ESP_DOWNGRADE_PREVENTION=y | ||
# This option makes downgrade prevention rely also on security | ||
# counter (defined using imgtool) instead of only image version | ||
# CONFIG_ESP_DOWNGRADE_PREVENTION_SECURITY_COUNTER=y | ||
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# Enables the MCUboot Serial Recovery, that allows the use of | ||
# MCUMGR to upload a firmware through the serial port | ||
# CONFIG_ESP_MCUBOOT_SERIAL=y | ||
# Use Serial through USB JTAG Serial port for Serial Recovery | ||
# CONFIG_ESP_MCUBOOT_SERIAL_USB_SERIAL_JTAG=y | ||
# Use sector erasing (recommended) instead of entire image size | ||
# erasing when uploading through Serial Recovery | ||
# CONFIG_ESP_MCUBOOT_ERASE_PROGRESSIVELY=y | ||
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# GPIO used to boot on Serial Recovery | ||
# CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT=5 | ||
# GPIO input type (0 for Pull-down, 1 for Pull-up) | ||
# CONFIG_ESP_SERIAL_BOOT_GPIO_INPUT_TYPE=0 | ||
# GPIO signal value | ||
# CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL=1 | ||
# Delay time for identify the GPIO signal | ||
# CONFIG_ESP_SERIAL_BOOT_DETECT_DELAY_S=5 | ||
# UART port used for serial communication (not needed when using USB) | ||
# CONFIG_ESP_SERIAL_BOOT_UART_NUM=1 | ||
# GPIO for Serial RX signal | ||
# CONFIG_ESP_SERIAL_BOOT_GPIO_RX=8 | ||
# GPIO for Serial TX signal | ||
# CONFIG_ESP_SERIAL_BOOT_GPIO_TX=9 | ||
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# Use UART0 for console printing (use either UART or USB alone) | ||
CONFIG_ESP_CONSOLE_UART=y | ||
CONFIG_ESP_CONSOLE_UART_NUM=0 | ||
# Configures alternative UART port for console printing | ||
# (UART_NUM=0 must not be changed) | ||
# CONFIG_ESP_CONSOLE_UART_CUSTOM=y | ||
# CONFIG_ESP_CONSOLE_UART_TX_GPIO=9 | ||
# CONFIG_ESP_CONSOLE_UART_RX_GPIO=8 | ||
# Use USB JTAG Serial for console printing | ||
# CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG=y | ||
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# CONFIG_ESP_SIGN_EC256=y | ||
# CONFIG_ESP_SIGN_ED25519=n | ||
# CONFIG_ESP_SIGN_RSA=n | ||
# CONFIG_ESP_SIGN_RSA_LEN=2048 | ||
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# Use Tinycrypt lib for EC256 or ED25519 signing | ||
# CONFIG_ESP_USE_TINYCRYPT=y | ||
# Use Mbed TLS lib for RSA image signing | ||
# CONFIG_ESP_USE_MBEDTLS=n | ||
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# It is strongly recommended to generate a new signing key | ||
# using imgtool instead of use the existent sample | ||
# CONFIG_ESP_SIGN_KEY_FILE=root-ec-p256.pem | ||
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# Hardware Secure Boot related options | ||
# CONFIG_SECURE_SIGNED_ON_BOOT=1 | ||
# CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME=1 | ||
# CONFIG_SECURE_BOOT=1 | ||
# CONFIG_SECURE_BOOT_V2_ENABLED=1 | ||
# CONFIG_SECURE_BOOT_SUPPORTS_RSA=1 | ||
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# Hardware Flash Encryption related options | ||
# CONFIG_SECURE_FLASH_ENC_ENABLED=1 | ||
# CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_ENC=1 | ||
# CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_DEC=1 | ||
# CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_CACHE=1 | ||
# CONFIG_SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT=1 | ||
# CONFIG_SECURE_BOOT_ALLOW_JTAG=1 | ||
# CONFIG_SECURE_BOOT_ALLOW_ROM_BASIC=1 | ||
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# Options for enabling eFuse emulation in Flash | ||
# CONFIG_EFUSE_VIRTUAL=1 | ||
# CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH=1 |
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