A CHISEL based RISC-V Vector (RVV) v1.0 Extension Coprocessor Generator.
| Dependencies | Version |
|---|---|
| sbt | 1.10.1 |
| verilator | 5.026 |
This project is a part of Google Summer of Code of 2024 mentored by Micro Electronics Research Lab (MERL).
GSoC Project: https://summerofcode.withgoogle.com/programs/2024/projects/FWHAVeL5