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Test
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niwciu authored Oct 24, 2024
2 parents 9c6afd8 + 3116b51 commit c5afd4c
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6 changes: 4 additions & 2 deletions .vscode/settings.json
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Expand Up @@ -85,8 +85,10 @@
"array": "c",
"string": "c",
"string_view": "c",
"modbus_master_data_interface.h": "c"
"modbus_master_data_interface.h": "c",
"main.h": "c"
},
"C_Cpp.errorSquiggles": "disabled",
"cmake.sourceDirectory": "D:/EMBEDDED/LIBRARIES/C_libraries/MODBUS/test/hw_test/STM32G070RB_MODBUS_MASTER"
"cmake.sourceDirectory": "D:/EMBEDDED/LIBRARIES/C_libraries/MODBUS/test/hw_test/STM32G070RB_MODBUS_MASTER",
"cortex-debug.variableUseNaturalFormat": true
}
102 changes: 7 additions & 95 deletions ReadMe.md
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Expand Up @@ -2,13 +2,9 @@
![GitHub License](https://img.shields.io/github/license/niwciu/MODBUS)
![GitHub top language](https://img.shields.io/github/languages/top/niwciu/MODBUS)
![GitHub Release](https://img.shields.io/github/v/release/niwciu/MODBUS)
![GitHub branch check runs](https://img.shields.io/github/check-runs/niwciu/LCD_HD44780/main)
![example workflow](https://github.com/niwciu/MODBUS/actions/workflows/run_modbus_tests.yml/badge.svg)
![example workflow](https://github.com/niwciu/MODBUS/actions/workflows/run_cppcheck.yml/badge.svg)
![example workflow](https://github.com/niwciu/MODBUS/actions/workflows/clang-format_check.yml/badge.svg)
![example workflow](https://github.com/niwciu/MODBUS/actions/workflows/run_lizard_lib_check.yml/badge.svg)

## Features

# Features
- Contain ModBus RTU Master and Slave implementation
- Support the following functions:
- Read Coils (0x01)
Expand All @@ -25,95 +21,11 @@
- ModBus Slave RTU implementation
- ModBus Master & Slave implementation on one harwdware platform
- Library contain unit test and integration tests that can be reused in project if needed
## Library contents description
TBD
## Examples
Library contain an examples of three different configurations that can be implemented in project. The fallowin configurations allow to run device as:
- ModBus RTU Slave (ModBus RTU Sever)
- ModBus RTU Master (ModBus RTU Client)
- ModBus RTU Slave&Master (ModBus RTU Sever&Client)

### How to run STM32G071RB ModBus RTU Slave example
#### Requirements for compiling and running the example:
1. CMake installed
2. Make or Ninja installed
3. ARM GNU Toolchain (gcc-arm-none-eabi) installed
4. STM32_Programmer_CLI installed
5. ST-link (placed on Nucleo Board) installed

In order to test the slave node, any software that can simulate Modbus Master RTU is required. In my case I was using [qModMaster](https://sourceforge.net/projects/qmodmaster/)


#### Hardware requirements, configuration, and connections
1. STM32G071 Nucleo-64<br>
![drawing](https://raw.githubusercontent.com/niwciu/MODBUS/main/examples/doc/images/STM32G071RB_Nucleo.png){width=500;}

#### How to build and run the example
1. Open the location you want to clone the repository to in your termina
3. Clone the repository to your preferred localization
```bash
git clone https://github.com/niwciu/MODBUS.git
```
4. Enter to MODBUS/examples/STM32G071RB_MODBUS_SLAVE
```bash
cd ./MODBUS/examples/STM32G071RB_MODBUS_SLAVE
```
5. For Make type:
```bash
cmake -S ./ -B Debug -G"Unix Makefiles" -DCMAKE_BUILD_TYPE=Debug
```
```bash
cd Debug
```
```bash
make all
```
```bash
make flash
```
6. For Ninja type:
```bash
cmake -S ./ -B Debug -G"Ninja" -DCMAKE_BUILD_TYPE=Debug
```
```bash
cd Debug
```
```bash
ninja
```
```bash
ninja flash
```
7. In some cases Nucleo board requires plugging out and in a USB port to run the program.
### How to run ModBus STM32G071RB RTU Master example
#### Requirements for compiling and running the example:
1. CMake installed
2. Make or Ninja installed
3. ARM GNU Toolchain (gcc-arm-none-eabi) installed
4. STM32_Programmer_CLI installed
5. ST-link (placed on Nucleo Board) installed

In order to test the Master node, any software that can simulate Modbus Slave RTU is required. In my case I was using [xxx]()


#### Hardware requirements, configuration, and connections
1. STM32G071 Nucleo-64<br>
![drawing](https://raw.githubusercontent.com/niwciu/MODBUS/main/examples/doc/images/STM32G071RB_Nucleo.png){width=500;}
### How to run ModBus STM32G071RB RTU Master&Slave example
#### Requirements for compiling and running the example:
1. CMake installed
2. Make or Ninja installed
3. ARM GNU Toolchain (gcc-arm-none-eabi) installed
4. STM32_Programmer_CLI installed
5. ST-link (placed on Nucleo Board) installed

In order to test the Master node, any software that can simulate Modbus Slave RTU is required. In my case I was using [xxx]()

#### Hardware requirements, configuration, and connections
1. STM32G071 Nucleo-64<br>
![drawing](https://raw.githubusercontent.com/niwciu/MODBUS/main/examples/doc/images/STM32G071RB_Nucleo.png){width=500;}

## How to configure, use in project, colaborate and more
For information about the configuration and usage of the library, as well as collaboration in the project please refer to
# How to run examples, configure, use in project, colaborate and more
For more information about running the examples, configuration and usage of the library, as well as collaboration in the project please refer to
[MODBUS wiki](https://github.com/niwciu/MODBUS/wiki)

***
![myEmbeddedWayBanerWhiteSmaller](https://github.com/user-attachments/assets/f4825882-e285-4e02-a75c-68fc86ff5716)
***
24 changes: 19 additions & 5 deletions examples/STM32G070RB_MODBUS_MASTER/CMakeLists.txt
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Expand Up @@ -26,7 +26,7 @@ set(CUSTOM_TARGETS_FILE_DIR ./custom_targets.cmake)
# Allow assembler
enable_language(ASM)

project(STM32G070RB_MODBUS_MASTER)
project(STM32G070RB_MODBUS_MASTER_HW_TEST)

set(INCLUDE_DIRS
Core
Expand All @@ -39,10 +39,10 @@ Drivers/CMSIS/Device
Drivers/CMSIS/Include
Drivers/CMSIS/STM32G0_Drivers
Drivers/STM32G0_Drivers/core_init
Drivers/STM32G0_Drivers/usart


../src
../../src
../../src/common
../../src/master_internall

../lib

Expand All @@ -53,8 +53,22 @@ set(C_SRCS
Core/Src/main.c
Core/Src/syscalls.c
Core/Src/sysmem.c
Core/Src/modbus_master_data_interface.c
Drivers/STM32G0_Drivers/core_init/core_init.c
Drivers/STM32G0_Drivers/usart/usart.c
Drivers/STM32G0_Drivers/modbus_driver_interface.c

../../src/master_internall/modbus_master_PDU.c
../../src/master_internall/modbus_master_RTU.c
../../src/master_internall/modbus_queue.c
../../src/master_internall/modbus_master_PDU.c
../../src/common/modbus_RTU.c
../../src/common/modbus_crc.c
../../src/common/buf_rw.c
../../src/common/modbus_PDU_common.c

../../src/modbus_master.c




)
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10 changes: 9 additions & 1 deletion examples/STM32G070RB_MODBUS_MASTER/Core/Inc/main.h
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@@ -1 +1,9 @@
#include "stm32g070xx.h"
#include "stm32g070xx.h"

#define SLAVE_ADDRES_EXAMPLE_NODE 0x01
#define READ_COIL_ADR 1
#define READ_HREG_ADR 1
#define WRITE_COIL_ADR 0
#define WRITE_HREG_ADR 0

#define UPDATE_INTERVAL_MS 300
83 changes: 66 additions & 17 deletions examples/STM32G070RB_MODBUS_MASTER/Core/Src/main.c
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Expand Up @@ -18,29 +18,78 @@

#include <stdint.h>
#include "main.h"
#include "usart.h"
#include "core_init.h"
#include "modbus_master.h"
#include "modbus_driver_interface.h"

#include <stdio.h>

#if !defined(__SOFT_FP__) && defined(__ARM_FP)
#warning "FPU is not initialized, but the project is compiling for an FPU. Please initialize the FPU before use."
#warning "FPU is not initialized, but the project is compiling for an FPU. Please initialize the FPU before use."
#endif

uint8_t test_buf[]={"hello world !!!\r\n"};
uint8_t test_buf_2[]={"test !!!\r\n"};
uint8_t test;
modbus_coil_disin_t readed_coil = 0;
modbus_coil_disin_t prev_coil_val= 0;
modbus_data_qty_t coil_qty = 1;

modbus_reg_t readed_hreg = 0;
modbus_reg_t prev_hreg_val = 0;
modbus_data_qty_t reg_qty = 1;

uint16_t request_interval = UPDATE_INTERVAL_MS;

uint16_t update_timer = UPDATE_INTERVAL_MS;

static void update_modbus_data(void);

int main(void)
{
core_init();

usart_init();
__enable_irq();
usart_send(test_buf,sizeof(test_buf));
while((USART3 -> CR1)&USART_CR1_TXEIE_TXFNFIE);
usart_send(test_buf_2,sizeof(test_buf_2));
enable_usart_rx_interrupt();
core_init();
modbus_master_init(RTU, 115200, ODD);
// __enable_irq();

/* Loop forever */
while(1)
{
test++;
}

while (1)
{
update_modbus_master_manager();

update_modbus_data();

}
}

// modbus_master_write_single_coil(WRITE_COIL_ADR, SLAVE_ADDRES_EXAMPLE_NODE, readed_coil);
// modbus_master_write_single_reg(WRITE_HREG_ADR, SLAVE_ADDRES_EXAMPLE_NODE, readed_hreg);
static void update_modbus_data(void)
{
if (update_timer == 0)
{
// if ((prev_coil_val != readed_coil) || (prev_hreg_val != readed_hreg))
// {
// modbus_master_write_single_coil(WRITE_COIL_ADR, SLAVE_ADDRES_EXAMPLE_NODE, readed_coil);
// modbus_master_write_single_reg(WRITE_HREG_ADR, SLAVE_ADDRES_EXAMPLE_NODE, readed_hreg);
// prev_coil_val = readed_coil;
// prev_hreg_val = readed_hreg;
// }
// else{
// modbus_master_read_coils(READ_COIL_ADR, coil_qty, SLAVE_ADDRES_EXAMPLE_NODE);
// modbus_master_read_holding_reg(READ_HREG_ADR, reg_qty, SLAVE_ADDRES_EXAMPLE_NODE);
// }
modbus_master_read_coils(READ_COIL_ADR, coil_qty, SLAVE_ADDRES_EXAMPLE_NODE);
modbus_master_read_holding_reg(READ_HREG_ADR, reg_qty, SLAVE_ADDRES_EXAMPLE_NODE);
modbus_master_write_single_coil(WRITE_COIL_ADR, SLAVE_ADDRES_EXAMPLE_NODE, readed_coil);
modbus_master_write_single_reg(WRITE_HREG_ADR, SLAVE_ADDRES_EXAMPLE_NODE, readed_hreg);
update_timer = request_interval;
}
}

void SysTick_Handler(void)
{
// Kod obsługi przerwania
if (update_timer)
{
update_timer--;
}
update_modbus_master_timout_timer();
}
Original file line number Diff line number Diff line change
@@ -0,0 +1,84 @@
/**
* @file modbus_master_data_interface.c
* @author niwciu (niwciu@gmail.com)
* @brief
* @version 0.0.1
* @date 2024-08-04
*
* @copyright Copyright (c) 2024
*
*/
#include "modbus_master_data_interface.h"
#include "main.h"

extern modbus_coil_disin_t readed_coil;
extern modbus_reg_t readed_hreg;
extern modbus_coil_disin_t prev_coil_val;
extern modbus_reg_t prev_hreg_val;

void modbus_master_coil_read(modbus_device_ID_t slave_adr, modbus_adr_t data_adr, modbus_coil_disin_t disin_val)
{
if( SLAVE_ADDRES_EXAMPLE_NODE == slave_adr)
{
if(READ_COIL_ADR == data_adr)
{
readed_coil= disin_val;
}
}
}

void modbus_master_hreg_read(modbus_device_ID_t slave_adr, modbus_adr_t data_adr, modbus_reg_t inreg_val)
{
if (SLAVE_ADDRES_EXAMPLE_NODE == slave_adr)
{
if (READ_HREG_ADR == data_adr)
{
readed_hreg = inreg_val;
}
}
}

// void modbus_master_coil_write(modbus_device_ID_t slave_adr, modbus_adr_t data_adr, modbus_data_qty_t coil_qty)
// {


// }
void modbus_master_coil_exception(const modbus_read_data_t *resp_data)
{
prev_coil_val = 0;
}
// void modbus_master_disin_read(modbus_device_ID_t slave_adr, modbus_adr_t data_adr, modbus_coil_disin_t disin_val)
// {

// }
// void modbus_master_disin_exception(const modbus_read_data_t *resp_data)
// {

// }

// void modbus_master_hreg_write(modbus_device_ID_t slave_adr, modbus_adr_t data_adr, modbus_data_qty_t reg_qty)
// {

// }
void modbus_master_hreg_exception(const modbus_read_data_t *resp_data)
{
prev_hreg_val = 0;
}
void modbus_master_inreg_read(modbus_device_ID_t slave_adr, modbus_adr_t data_adr, modbus_reg_t inreg_val)
{

}
// void modbus_master_inreg_exception(const modbus_read_data_t *resp_data)
// {

// }
void modbus_master_data_timeout_error(const modbus_master_error_report_t *timeout_error_rep)
{
prev_coil_val = 0;
prev_hreg_val = 666;
}
void modbus_master_communication_error(const modbus_master_error_report_t *communication_error_rep)
{
prev_coil_val = 0;
prev_hreg_val = 777;
}
Original file line number Diff line number Diff line change
Expand Up @@ -56,6 +56,6 @@ void core_init(void)
RCC->CFGR &= ~(RCC_CFGR_PPRE);
RCC->CFGR |= 0;
SysTick->LOAD = (uint32_t)((SYS_FREQ / SYS_TICK_MAX_CNT) - 1UL); /* set reload register */
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_ENABLE_Msk;
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | SysTick_CTRL_ENABLE_Msk | SysTick_CTRL_TICKINT_Msk;
}
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