Run make build-mips-programs

o1-labs · Dec 23, 2024 · 49235d3 · 49235d3
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diff --git a/o1vm/resources/programs/mips/bin/add b/o1vm/resources/programs/mips/bin/add
diff --git a/o1vm/resources/programs/mips/bin/addi b/o1vm/resources/programs/mips/bin/addi
diff --git a/o1vm/resources/programs/mips/bin/addiu b/o1vm/resources/programs/mips/bin/addiu
diff --git a/o1vm/resources/programs/mips/bin/addu b/o1vm/resources/programs/mips/bin/addu
diff --git a/o1vm/resources/programs/mips/bin/and b/o1vm/resources/programs/mips/bin/and
diff --git a/o1vm/resources/programs/mips/bin/andi b/o1vm/resources/programs/mips/bin/andi
diff --git a/o1vm/resources/programs/mips/bin/beq b/o1vm/resources/programs/mips/bin/beq
diff --git a/o1vm/resources/programs/mips/bin/bgez b/o1vm/resources/programs/mips/bin/bgez
diff --git a/o1vm/resources/programs/mips/bin/bgtz b/o1vm/resources/programs/mips/bin/bgtz
diff --git a/o1vm/resources/programs/mips/bin/blez b/o1vm/resources/programs/mips/bin/blez
diff --git a/o1vm/resources/programs/mips/bin/bltz b/o1vm/resources/programs/mips/bin/bltz
diff --git a/o1vm/resources/programs/mips/bin/bne b/o1vm/resources/programs/mips/bin/bne
diff --git a/o1vm/resources/programs/mips/bin/brk b/o1vm/resources/programs/mips/bin/brk
diff --git a/o1vm/resources/programs/mips/bin/clo b/o1vm/resources/programs/mips/bin/clo
diff --git a/o1vm/resources/programs/mips/bin/clone b/o1vm/resources/programs/mips/bin/clone
diff --git a/o1vm/resources/programs/mips/bin/clz b/o1vm/resources/programs/mips/bin/clz
diff --git a/o1vm/resources/programs/mips/bin/div b/o1vm/resources/programs/mips/bin/div
diff --git a/o1vm/resources/programs/mips/bin/divu b/o1vm/resources/programs/mips/bin/divu
diff --git a/o1vm/resources/programs/mips/bin/exit_group b/o1vm/resources/programs/mips/bin/exit_group
diff --git a/o1vm/resources/programs/mips/bin/fcntl b/o1vm/resources/programs/mips/bin/fcntl
diff --git a/o1vm/resources/programs/mips/bin/j b/o1vm/resources/programs/mips/bin/j
diff --git a/o1vm/resources/programs/mips/bin/jal b/o1vm/resources/programs/mips/bin/jal
diff --git a/o1vm/resources/programs/mips/bin/jalr b/o1vm/resources/programs/mips/bin/jalr
diff --git a/o1vm/resources/programs/mips/bin/jr b/o1vm/resources/programs/mips/bin/jr
diff --git a/o1vm/resources/programs/mips/bin/lb b/o1vm/resources/programs/mips/bin/lb
diff --git a/o1vm/resources/programs/mips/bin/lbu b/o1vm/resources/programs/mips/bin/lbu
diff --git a/o1vm/resources/programs/mips/bin/lh b/o1vm/resources/programs/mips/bin/lh
diff --git a/o1vm/resources/programs/mips/bin/lhu b/o1vm/resources/programs/mips/bin/lhu
diff --git a/o1vm/resources/programs/mips/bin/lui b/o1vm/resources/programs/mips/bin/lui
diff --git a/o1vm/resources/programs/mips/bin/lw b/o1vm/resources/programs/mips/bin/lw
diff --git a/o1vm/resources/programs/mips/bin/lwl b/o1vm/resources/programs/mips/bin/lwl
diff --git a/o1vm/resources/programs/mips/bin/lwr b/o1vm/resources/programs/mips/bin/lwr
diff --git a/o1vm/resources/programs/mips/bin/mfthi b/o1vm/resources/programs/mips/bin/mfthi
diff --git a/o1vm/resources/programs/mips/bin/mftlo b/o1vm/resources/programs/mips/bin/mftlo
diff --git a/o1vm/resources/programs/mips/bin/mmap b/o1vm/resources/programs/mips/bin/mmap
diff --git a/o1vm/resources/programs/mips/bin/movn b/o1vm/resources/programs/mips/bin/movn
diff --git a/o1vm/resources/programs/mips/bin/movz b/o1vm/resources/programs/mips/bin/movz
diff --git a/o1vm/resources/programs/mips/bin/mul b/o1vm/resources/programs/mips/bin/mul
diff --git a/o1vm/resources/programs/mips/bin/mult b/o1vm/resources/programs/mips/bin/mult
diff --git a/o1vm/resources/programs/mips/bin/multu b/o1vm/resources/programs/mips/bin/multu
diff --git a/o1vm/resources/programs/mips/bin/nor b/o1vm/resources/programs/mips/bin/nor
diff --git a/o1vm/resources/programs/mips/bin/oracle b/o1vm/resources/programs/mips/bin/oracle
diff --git a/o1vm/resources/programs/mips/bin/oracle_kzg b/o1vm/resources/programs/mips/bin/oracle_kzg
diff --git a/o1vm/resources/programs/mips/bin/oracle_unaligned_read b/o1vm/resources/programs/mips/bin/oracle_unaligned_read
diff --git a/o1vm/resources/programs/mips/bin/oracle_unaligned_write b/o1vm/resources/programs/mips/bin/oracle_unaligned_write
diff --git a/o1vm/resources/programs/mips/bin/ori b/o1vm/resources/programs/mips/bin/ori
diff --git a/o1vm/resources/programs/mips/bin/sb b/o1vm/resources/programs/mips/bin/sb
diff --git a/o1vm/resources/programs/mips/bin/sh b/o1vm/resources/programs/mips/bin/sh
diff --git a/o1vm/resources/programs/mips/bin/sll b/o1vm/resources/programs/mips/bin/sll
diff --git a/o1vm/resources/programs/mips/bin/sllv b/o1vm/resources/programs/mips/bin/sllv
diff --git a/o1vm/resources/programs/mips/bin/slt b/o1vm/resources/programs/mips/bin/slt
diff --git a/o1vm/resources/programs/mips/bin/slti b/o1vm/resources/programs/mips/bin/slti
diff --git a/o1vm/resources/programs/mips/bin/sltiu b/o1vm/resources/programs/mips/bin/sltiu
diff --git a/o1vm/resources/programs/mips/bin/sltu b/o1vm/resources/programs/mips/bin/sltu
diff --git a/o1vm/resources/programs/mips/bin/sra b/o1vm/resources/programs/mips/bin/sra
diff --git a/o1vm/resources/programs/mips/bin/srav b/o1vm/resources/programs/mips/bin/srav
diff --git a/o1vm/resources/programs/mips/bin/srl b/o1vm/resources/programs/mips/bin/srl
diff --git a/o1vm/resources/programs/mips/bin/srlv b/o1vm/resources/programs/mips/bin/srlv
diff --git a/o1vm/resources/programs/mips/bin/sub b/o1vm/resources/programs/mips/bin/sub
diff --git a/o1vm/resources/programs/mips/bin/subu b/o1vm/resources/programs/mips/bin/subu
diff --git a/o1vm/resources/programs/mips/bin/swl b/o1vm/resources/programs/mips/bin/swl
diff --git a/o1vm/resources/programs/mips/bin/swr b/o1vm/resources/programs/mips/bin/swr
diff --git a/o1vm/resources/programs/mips/bin/xor b/o1vm/resources/programs/mips/bin/xor
diff --git a/o1vm/resources/programs/mips/bin/xori b/o1vm/resources/programs/mips/bin/xori
diff --git a/o1vm/resources/programs/mips/src/add.asm b/o1vm/resources/programs/mips/src/add.asm
@@ -0,0 +1,38 @@
+###############################################################################
+# File         : add.asm
+# Project      : MIPS32 MUX
+# Author:      : Grant Ayers (ayers@cs.stanford.edu)
+#
+# Standards/Formatting:
+#   MIPS gas, soft tab, 80 column
+#
+# Description:
+#   Test the functionality of the 'add' instruction.
+#
+###############################################################################
+
+
+.section .text
+.global __start
+__start:
+    lui     $s0, 0xbfff         # Load the base address 0xbffffff0
+    ori     $s0, 0xfff0
+    ori     $s1, $0, 1          # Prepare the 'done' status
+
+    #### Test code start ####
+
+    lui     $t0, 0xffff         # A = 0xfffffffd (-3)
+    ori     $t0, 0xfffd
+    ori     $t1, $0, 0x3        # B = 0x3
+    add     $t2, $t0, $t1       # C = A + B = 0
+    sltiu   $v0, $t2, 1         # D = 1 if C == 0
+
+    #### Test code end ####
+
+    sw      $v0, 8($s0)         # Set the test result
+    sw      $s1, 4($s0)         # Set 'done'
+
+$done:
+    jr      $ra
+    nop
+
diff --git a/o1vm/resources/programs/mips/src/addi.asm b/o1vm/resources/programs/mips/src/addi.asm
@@ -0,0 +1,38 @@
+###############################################################################
+# File         : addi.asm
+# Project      : MIPS32 MUX
+# Author       : Grant Ayers (ayers@cs.stanford.edu)
+#
+# Standards/Formatting:
+#   MIPS gas, soft tab, 80 column
+#
+# Description:
+#   Test the functionality of the 'addi' instruction.
+#
+###############################################################################
+
+
+.section .text
+.global __start
+__start:
+    lui     $s0, 0xbfff         # Load the base address 0xbffffff0
+    ori     $s0, 0xfff0
+    ori     $s1, $0, 1          # Prepare the 'done' status
+
+    #### Test code start ####
+
+    lui     $t0, 0xffff         # A = 0xfffffffd (-3)
+    ori     $t0, 0xfffd
+    addi    $t1, $t0, 5         # B = A + 5 = 2
+    addi    $t2, $t1, 0xfffe    # C = B + -2 = 0
+    sltiu   $v0, $t2, 1         # D = 1 if C == 0
+
+    #### Test code end ####
+
+    sw      $v0, 8($s0)         # Set the test result
+    sw      $s1, 4($s0)         # Set 'done'
+
+$done:
+    jr      $ra
+    nop
+
diff --git a/o1vm/resources/programs/mips/src/addiu.asm b/o1vm/resources/programs/mips/src/addiu.asm
@@ -0,0 +1,38 @@
+###############################################################################
+# File         : addiu.asm
+# Project      : MIPS32 MUX
+# Author       : Grant Ayers (ayers@cs.stanford.edu)
+#
+# Standards/Formatting:
+#   MIPS gas, soft tab, 80 column
+#
+# Description:
+#   Test the functionality of the 'addiu' instruction.
+#
+###############################################################################
+
+
+.section .text
+.global __start
+__start:
+    lui     $s0, 0xbfff         # Load the base address 0xbffffff0
+    ori     $s0, 0xfff0
+    ori     $s1, $0, 1          # Prepare the 'done' status
+
+    #### Test code start ####
+
+    lui     $t0, 0xffff         # A = 0xfffffffd (-3)
+    ori     $t0, 0xfffd
+    addiu   $t1, $t0, 5         # B = A + 5 = 2
+    addiu   $t2, $t1, 0xfffe    # C = B + -2 = 0
+    sltiu   $v0, $t2, 1         # D = 1 if C == 0
+
+    #### Test code end ####
+
+    sw      $v0, 8($s0)         # Set the test result
+    sw      $s1, 4($s0)         # Set 'done'
+
+$done:
+    jr      $ra
+    nop
+
diff --git a/o1vm/resources/programs/mips/src/addu.asm b/o1vm/resources/programs/mips/src/addu.asm
@@ -0,0 +1,38 @@
+###############################################################################
+# File         : addu.asm
+# Project      : MIPS32 MUX
+# Author       : Grant Ayers (ayers@cs.stanford.edu)
+#
+# Standards/Formatting:
+#   MIPS gas, soft tab, 80 column
+#
+# Description:
+#   Test the functionality of the 'addu' instruction.
+#
+###############################################################################
+
+
+.section .text
+.global __start
+__start:
+    lui     $s0, 0xbfff         # Load the base address 0xbffffff0
+    ori     $s0, 0xfff0
+    ori     $s1, $0, 1          # Prepare the 'done' status
+
+    #### Test code start ####
+
+    lui     $t0, 0xffff         # A = 0xfffffffd (-3)
+    ori     $t0, 0xfffd
+    ori     $t1, $0, 0x3        # B = 0x3
+    addu    $t2, $t0, $t1       # C = A + B = 0
+    sltiu   $v0, $t2, 1         # D = 1 if C == 0
+
+    #### Test code end ####
+
+    sw      $v0, 8($s0)         # Set the test result
+    sw      $s1, 4($s0)         # Set 'done'
+
+$done:
+    jr      $ra
+    nop
+
diff --git a/o1vm/resources/programs/mips/src/and.asm b/o1vm/resources/programs/mips/src/and.asm
@@ -0,0 +1,42 @@
+###############################################################################
+# File         : and.asm
+# Project      : MIPS32 MUX
+# Author:      : Grant Ayers (ayers@cs.stanford.edu)
+#
+# Standards/Formatting:
+#   MIPS gas, soft tab, 80 column
+#
+# Description:
+#   Test the functionality of the 'and' instruction.
+#
+###############################################################################
+
+
+.section .text
+.global __start
+__start:
+    lui     $s0, 0xbfff         # Load the base address 0xbffffff0
+    ori     $s0, 0xfff0
+    ori     $s1, $0, 1          # Prepare the 'done' status
+
+    #### Test code start ####
+
+    lui     $t0, 0xdeaf         # A = 0xdeafbeef
+    lui     $t1, 0xaaaa         # B = 0xaaaaaaaa
+    lui     $t2, 0x5555         # C = 0x55555555
+    ori     $t0, 0xbeef
+    ori     $t1, 0xaaaa
+    ori     $t2, 0x5555
+    and     $t3, $t0, $t1       # D = A & B = 0x8aaaaaaa
+    and     $t4, $t2, $t3       # E = B & D = 0
+    sltiu   $v0, $t4, 1
+
+    #### Test code end ####
+
+    sw      $v0, 8($s0)         # Set the test result
+    sw      $s1, 4($s0)         # Set 'done'
+
+$done:
+    jr      $ra
+    nop
+
diff --git a/o1vm/resources/programs/mips/src/andi.asm b/o1vm/resources/programs/mips/src/andi.asm
@@ -0,0 +1,37 @@
+###############################################################################
+# File         : andi.asm
+# Project      : MIPS32 MUX
+# Author:      : Grant Ayers (ayers@cs.stanford.edu)
+#
+# Standards/Formatting:
+#   MIPS gas, soft tab, 80 column
+#
+# Description:
+#   Test the functionality of the 'andi' instruction.
+#
+###############################################################################
+
+
+.section .text
+.global __start
+__start:
+    lui     $s0, 0xbfff         # Load the base address 0xbffffff0
+    ori     $s0, 0xfff0
+    ori     $s1, $0, 1          # Prepare the 'done' status
+
+    #### Test code start ####
+
+    ori     $t0, $0,  0xcafe    # A = 0xcafe
+    andi    $t1, $t0, 0xaaaa    # B = A & 0xaaaa = 0x8aaa
+    andi    $t2, $t1, 0x5555    # C = B & 0x5555 = 0
+    sltiu   $v0, $t2, 1
+
+    #### Test code end ####
+
+    sw      $v0, 8($s0)         # Set the test result
+    sw      $s1, 4($s0)         # Set 'done'
+
+$done:
+    jr      $ra
+    nop
+
diff --git a/o1vm/resources/programs/mips/src/beq.asm b/o1vm/resources/programs/mips/src/beq.asm
@@ -0,0 +1,50 @@
+###############################################################################
+# File         : beq.asm
+# Project      : MIPS32 MUX
+# Author:      : Grant Ayers (ayers@cs.stanford.edu)
+#
+# Standards/Formatting:
+#   MIPS gas, soft tab, 80 column
+#
+# Description:
+#   Test the functionality of the 'beq' instruction.
+#
+###############################################################################
+
+
+.section .text
+.global __start
+__start:
+    lui     $s0, 0xbfff         # Load the base address 0xbffffff0
+    ori     $s0, 0xfff0
+    ori     $s1, $0, 1          # Prepare the 'done' status
+
+    #### Test code start ####
+
+    ori     $t0, $0,  0xcafe
+    ori     $t1, $0,  0xcafe
+    ori     $v0, $0,  0         # The test result starts as a failure
+    beq     $t0, $v0, $finish   # No branch
+    nop
+    beq     $t0, $t1, $target
+    nop
+
+$finish:
+    sw      $v0, 8($s0)
+    sw      $s1, 4($s0)
+
+$done:
+    jr      $ra
+    nop
+    j       $finish             # Early-by-1 branch detection
+
+$target:
+    nop
+    ori     $v0, $0, 1          # Set the result to pass
+    beq     $0, $0, $finish     # Late-by-1 branch detection (result not stored)
+    nop
+    j       $finish
+    nop
+
+    #### Test code end ####
+
diff --git a/o1vm/resources/programs/mips/src/bgez.asm b/o1vm/resources/programs/mips/src/bgez.asm
@@ -0,0 +1,48 @@
+###############################################################################
+# File         : bgez.asm
+# Project      : MIPS32 MUX
+# Author:      : Grant Ayers (ayers@cs.stanford.edu)
+#
+# Standards/Formatting:
+#   MIPS gas, soft tab, 80 column
+#
+# Description:
+#   Test the functionality of the 'bgez' instruction.
+#
+###############################################################################
+
+
+.section .text
+.global __start
+__start:
+    lui     $s0, 0xbfff         # Load the base address 0xbffffff0
+    ori     $s0, 0xfff0
+    ori     $s1, $0, 1          # Prepare the 'done' status
+
+    #### Test code start ####
+
+    lui     $t0, 0xffff
+    bgez    $t0, $finish        # No branch
+    nop
+    bgez    $s1, $target
+    nop
+
+$finish:
+    sw      $v0, 8($s0)
+    sw      $s1, 4($s0)
+
+$done:
+    jr      $ra
+    nop
+    j       $finish             # Early-by-1 branch detection
+
+$target:
+    nop
+    ori     $v0, $0, 1          # Set the result to pass
+    bgez    $0, $finish         # Late-by-1 branch detection (result not stored)
+    nop
+    j       $finish             # Broken branch recovery
+    nop
+
+    #### Test code end ####
+
diff --git a/o1vm/resources/programs/mips/src/bgtz.asm b/o1vm/resources/programs/mips/src/bgtz.asm
@@ -0,0 +1,49 @@
+###############################################################################
+# File         : bgtz.asm
+# Project      : MIPS32 MUX
+# Author:      : Grant Ayers (ayers@cs.stanford.edu)
+#
+# Standards/Formatting:
+#   MIPS gas, soft tab, 80 column
+#
+# Description:
+#   Test the functionality of the 'bgtz' instruction.
+#
+###############################################################################
+
+
+.section .text
+.global __start
+__start:
+    lui     $s0, 0xbfff         # Load the base address 0xbffffff0
+    ori     $s0, 0xfff0
+    ori     $s1, $0, 1          # Prepare the 'done' status
+
+    #### Test code start ####
+
+    ori     $v0, $0, 0          # The test result starts as a failure
+    lui     $t0, 0xffff
+    bgtz    $t0, $finish        # No branch
+    nop
+    bgtz    $s1, $target
+    nop
+
+$finish:
+    sw      $v0, 8($s0)
+    sw      $s1, 4($s0)
+
+$done:
+    jr      $ra
+    nop
+    j       $finish             # Early-by-1 branch detection
+
+$target:
+    nop
+    ori     $v0, $0, 1          # Set the result to pass
+    bgtz    $s1, $finish        # Late-by-1 branch detection (result not stored)
+    nop
+    j       $finish             # Broken branch recovery
+    nop
+
+    #### Test code end ####
+