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Add some missing validations in CTS
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@omarahmed1111
omarahmed1111 committed Mar 1, 2024
1 parent 8499b57 commit 6f6b5f2
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Showing 14 changed files with 301 additions and 7 deletions.
36 changes: 36 additions & 0 deletions test/conformance/device/urDeviceGet.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -35,6 +35,42 @@ TEST_F(urDeviceGetTest, SuccessSubsetOfDevices) {
}
}

struct urDeviceGetTestWithDeviceTypeParam
: uur::urAllDevicesTest,
::testing::WithParamInterface<ur_device_type_t> {

void SetUp() override {
UUR_RETURN_ON_FATAL_FAILURE(uur::urAllDevicesTest::SetUp());
}
};

INSTANTIATE_TEST_SUITE_P(
, urDeviceGetTestWithDeviceTypeParam,
::testing::Values(UR_DEVICE_TYPE_DEFAULT, UR_DEVICE_TYPE_GPU,
UR_DEVICE_TYPE_CPU, UR_DEVICE_TYPE_FPGA,
UR_DEVICE_TYPE_MCA, UR_DEVICE_TYPE_VPU),
[](const ::testing::TestParamInfo<ur_device_type_t> &info) {
std::stringstream ss;
ss << info.param;
return ss.str();
});

TEST_P(urDeviceGetTestWithDeviceTypeParam, Success) {
ur_device_type_t device_type = GetParam();
uint32_t count = 0;
ASSERT_SUCCESS(urDeviceGet(platform, device_type, 0, nullptr, &count));
ASSERT_GE(devices.size(), count);

if (count > 0) {
std::vector<ur_device_handle_t> devices(count);
ASSERT_SUCCESS(
urDeviceGet(platform, device_type, count, devices.data(), nullptr));
for (auto device : devices) {
ASSERT_NE(nullptr, device);
}
}
}

TEST_F(urDeviceGetTest, InvalidNullHandlePlatform) {
uint32_t count;
ASSERT_EQ_RESULT(
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13 changes: 10 additions & 3 deletions test/conformance/enqueue/urEnqueueMemBufferMap.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -21,14 +21,21 @@ TEST_P(urEnqueueMemBufferMapTest, SuccessRead) {
}
}

TEST_P(urEnqueueMemBufferMapTest, SuccessWrite) {
using urEnqueueMemBufferMapTestWithWriteFlagParam =
uur::urMemBufferQueueTestWithParam<ur_map_flag_t>;
UUR_TEST_SUITE_P(urEnqueueMemBufferMapTestWithWriteFlagParam,
::testing::Values(UR_MAP_FLAG_WRITE,
UR_MAP_FLAG_WRITE_INVALIDATE_REGION),
uur::deviceTestWithParamPrinter<ur_map_flag_t>);

TEST_P(urEnqueueMemBufferMapTestWithWriteFlagParam, SuccessWrite) {
const std::vector<uint32_t> input(count, 0);
ASSERT_SUCCESS(urEnqueueMemBufferWrite(queue, buffer, true, 0, size,
input.data(), 0, nullptr, nullptr));

uint32_t *map = nullptr;
ASSERT_SUCCESS(urEnqueueMemBufferMap(queue, buffer, true, UR_MAP_FLAG_WRITE,
0, size, 0, nullptr, nullptr,
ASSERT_SUCCESS(urEnqueueMemBufferMap(queue, buffer, true, getParam(), 0,
size, 0, nullptr, nullptr,
(void **)&map));
for (unsigned i = 0; i < count; ++i) {
map[i] = 42;
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15 changes: 15 additions & 0 deletions test/conformance/memory/memory_adapter_cuda.match
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Original file line number Diff line number Diff line change
@@ -1,6 +1,20 @@
urMemBufferCreateWithNativeHandleTest.Success/NVIDIA_CUDA_BACKEND___{{.*}}_
{{OPT}}urMemGetInfoImageTest.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_MEM_INFO_SIZE
{{OPT}}urMemGetInfoImageTest.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_MEM_INFO_CONTEXT
urMemImageCreateTestWithChannelOrderParam.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_CHANNEL_ORDER_A
urMemImageCreateTestWithChannelOrderParam.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_CHANNEL_ORDER_R
urMemImageCreateTestWithChannelOrderParam.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_CHANNEL_ORDER_RG
urMemImageCreateTestWithChannelOrderParam.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_CHANNEL_ORDER_RA
urMemImageCreateTestWithChannelOrderParam.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_CHANNEL_ORDER_RGB
urMemImageCreateTestWithChannelOrderParam.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_CHANNEL_ORDER_BGRA
urMemImageCreateTestWithChannelOrderParam.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_CHANNEL_ORDER_ARGB
urMemImageCreateTestWithChannelOrderParam.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_CHANNEL_ORDER_ABGR
urMemImageCreateTestWithChannelOrderParam.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_CHANNEL_ORDER_INTENSITY
urMemImageCreateTestWithChannelOrderParam.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_CHANNEL_ORDER_LUMINANCE
urMemImageCreateTestWithChannelOrderParam.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_CHANNEL_ORDER_RX
urMemImageCreateTestWithChannelOrderParam.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_CHANNEL_ORDER_RGX
urMemImageCreateTestWithChannelOrderParam.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_CHANNEL_ORDER_RGBX
urMemImageCreateTestWithChannelOrderParam.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_CHANNEL_ORDER_SRGBA
{{OPT}}urMemImageGetInfoTest.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_INFO_FORMAT
{{OPT}}urMemImageGetInfoTest.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_INFO_ELEMENT_SIZE
{{OPT}}urMemImageGetInfoTest.Success/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_INFO_ROW_PITCH
Expand All @@ -15,3 +29,4 @@ urMemBufferCreateWithNativeHandleTest.Success/NVIDIA_CUDA_BACKEND___{{.*}}_
{{OPT}}urMemImageGetInfoTest.InvalidSizeSmall/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_INFO_WIDTH
{{OPT}}urMemImageGetInfoTest.InvalidSizeSmall/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_INFO_HEIGHT
{{OPT}}urMemImageGetInfoTest.InvalidSizeSmall/NVIDIA_CUDA_BACKEND___{{.*}}___UR_IMAGE_INFO_DEPTH
Aborted
15 changes: 15 additions & 0 deletions test/conformance/memory/memory_adapter_hip.match
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Original file line number Diff line number Diff line change
@@ -1,4 +1,19 @@
{{OPT}}urMemBufferCreateWithNativeHandleTest.Success/AMD_HIP_BACKEND___{{.*}}
{{OPT}}urMemImageCreateTest.InvalidSize/AMD_HIP_BACKEND___{{.*}}
urMemImageCreateTestWithChannelOrderParam.Success/AMD_HIP_BACKEND___AMD_Radeon_RX_6800_XT___UR_IMAGE_CHANNEL_ORDER_A
urMemImageCreateTestWithChannelOrderParam.Success/AMD_HIP_BACKEND___AMD_Radeon_RX_6800_XT___UR_IMAGE_CHANNEL_ORDER_R
urMemImageCreateTestWithChannelOrderParam.Success/AMD_HIP_BACKEND___AMD_Radeon_RX_6800_XT___UR_IMAGE_CHANNEL_ORDER_RG
urMemImageCreateTestWithChannelOrderParam.Success/AMD_HIP_BACKEND___AMD_Radeon_RX_6800_XT___UR_IMAGE_CHANNEL_ORDER_RA
urMemImageCreateTestWithChannelOrderParam.Success/AMD_HIP_BACKEND___AMD_Radeon_RX_6800_XT___UR_IMAGE_CHANNEL_ORDER_RGB
urMemImageCreateTestWithChannelOrderParam.Success/AMD_HIP_BACKEND___AMD_Radeon_RX_6800_XT___UR_IMAGE_CHANNEL_ORDER_BGRA
urMemImageCreateTestWithChannelOrderParam.Success/AMD_HIP_BACKEND___AMD_Radeon_RX_6800_XT___UR_IMAGE_CHANNEL_ORDER_ARGB
urMemImageCreateTestWithChannelOrderParam.Success/AMD_HIP_BACKEND___AMD_Radeon_RX_6800_XT___UR_IMAGE_CHANNEL_ORDER_ABGR
urMemImageCreateTestWithChannelOrderParam.Success/AMD_HIP_BACKEND___AMD_Radeon_RX_6800_XT___UR_IMAGE_CHANNEL_ORDER_INTENSITY
urMemImageCreateTestWithChannelOrderParam.Success/AMD_HIP_BACKEND___AMD_Radeon_RX_6800_XT___UR_IMAGE_CHANNEL_ORDER_LUMINANCE
urMemImageCreateTestWithChannelOrderParam.Success/AMD_HIP_BACKEND___AMD_Radeon_RX_6800_XT___UR_IMAGE_CHANNEL_ORDER_RX
urMemImageCreateTestWithChannelOrderParam.Success/AMD_HIP_BACKEND___AMD_Radeon_RX_6800_XT___UR_IMAGE_CHANNEL_ORDER_RGX
urMemImageCreateTestWithChannelOrderParam.Success/AMD_HIP_BACKEND___AMD_Radeon_RX_6800_XT___UR_IMAGE_CHANNEL_ORDER_RGBX
urMemImageCreateTestWithChannelOrderParam.Success/AMD_HIP_BACKEND___AMD_Radeon_RX_6800_XT___UR_IMAGE_CHANNEL_ORDER_SRGBA
{{OPT}}urMemImageGetInfoTest.Success/AMD_HIP_BACKEND___{{.*}}
{{OPT}}urMemImageGetInfoTest.Success/AMD_HIP_BACKEND___{{.*}}
Aborted
37 changes: 37 additions & 0 deletions test/conformance/memory/memory_adapter_native_cpu.match
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Original file line number Diff line number Diff line change
Expand Up @@ -14,6 +14,43 @@ urMemImageCreateTest.InvalidImageDescNumMipLevel/SYCL_NATIVE_CPU___SYCL_Native_C
urMemImageCreateTest.InvalidImageDescNumSamples/SYCL_NATIVE_CPU___SYCL_Native_CPU_
urMemImageCreateTest.InvalidImageDescRowPitch/SYCL_NATIVE_CPU___SYCL_Native_CPU_
urMemImageCreateTest.InvalidImageDescSlicePitch/SYCL_NATIVE_CPU___SYCL_Native_CPU_
urMemImageCreateTestWithChannelOrderParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_ORDER_A
urMemImageCreateTestWithChannelOrderParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_ORDER_R
urMemImageCreateTestWithChannelOrderParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_ORDER_RG
urMemImageCreateTestWithChannelOrderParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_ORDER_RA
urMemImageCreateTestWithChannelOrderParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_ORDER_RGB
urMemImageCreateTestWithChannelOrderParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_ORDER_RGBA
urMemImageCreateTestWithChannelOrderParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_ORDER_BGRA
urMemImageCreateTestWithChannelOrderParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_ORDER_ARGB
urMemImageCreateTestWithChannelOrderParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_ORDER_ABGR
urMemImageCreateTestWithChannelOrderParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_ORDER_INTENSITY
urMemImageCreateTestWithChannelOrderParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_ORDER_LUMINANCE
urMemImageCreateTestWithChannelOrderParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_ORDER_RX
urMemImageCreateTestWithChannelOrderParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_ORDER_RGX
urMemImageCreateTestWithChannelOrderParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_ORDER_RGBX
urMemImageCreateTestWithChannelOrderParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_ORDER_SRGBA
urMemImageCreateTestWithChannelTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_TYPE_SNORM_INT8
urMemImageCreateTestWithChannelTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_TYPE_SNORM_INT16
urMemImageCreateTestWithChannelTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_TYPE_UNORM_INT8
urMemImageCreateTestWithChannelTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_TYPE_UNORM_INT16
urMemImageCreateTestWithChannelTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_TYPE_UNORM_SHORT_565
urMemImageCreateTestWithChannelTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_TYPE_UNORM_SHORT_555
urMemImageCreateTestWithChannelTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_TYPE_INT_101010
urMemImageCreateTestWithChannelTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_TYPE_SIGNED_INT8
urMemImageCreateTestWithChannelTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_TYPE_SIGNED_INT16
urMemImageCreateTestWithChannelTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_TYPE_SIGNED_INT32
urMemImageCreateTestWithChannelTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_TYPE_UNSIGNED_INT8
urMemImageCreateTestWithChannelTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_TYPE_UNSIGNED_INT16
urMemImageCreateTestWithChannelTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_TYPE_UNSIGNED_INT32
urMemImageCreateTestWithChannelTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_TYPE_HALF_FLOAT
urMemImageCreateTestWithChannelTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_CHANNEL_TYPE_FLOAT
urMemImageCreateTestWithMemoryTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_MEM_TYPE_BUFFER
urMemImageCreateTestWithMemoryTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_MEM_TYPE_IMAGE2D
urMemImageCreateTestWithMemoryTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_MEM_TYPE_IMAGE3D
urMemImageCreateTestWithMemoryTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_MEM_TYPE_IMAGE2D_ARRAY
urMemImageCreateTestWithMemoryTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_MEM_TYPE_IMAGE1D
urMemImageCreateTestWithMemoryTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_MEM_TYPE_IMAGE1D_ARRAY
urMemImageCreateTestWithMemoryTypeParam.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_MEM_TYPE_IMAGE1D_BUFFER
urMemImageGetInfoTest.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_INFO_FORMAT
urMemImageGetInfoTest.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_INFO_ELEMENT_SIZE
urMemImageGetInfoTest.Success/SYCL_NATIVE_CPU___SYCL_Native_CPU___UR_IMAGE_INFO_ROW_PITCH
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22 changes: 22 additions & 0 deletions test/conformance/memory/memory_adapter_opencl.match
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Original file line number Diff line number Diff line change
@@ -1 +1,23 @@
urMemImageCreateTest.InvalidImageDescStype/Intel_R__OpenCL___{{.*}}
urMemImageCreateTestWithChannelOrderParam.Success/Intel_R__OpenCL___{{.*}}___UR_IMAGE_CHANNEL_ORDER_A
urMemImageCreateTestWithChannelOrderParam.Success/Intel_R__OpenCL___{{.*}}___UR_IMAGE_CHANNEL_ORDER_RA
urMemImageCreateTestWithChannelOrderParam.Success/Intel_R__OpenCL___{{.*}}___UR_IMAGE_CHANNEL_ORDER_RGB
urMemImageCreateTestWithChannelOrderParam.Success/Intel_R__OpenCL___{{.*}}___UR_IMAGE_CHANNEL_ORDER_BGRA
urMemImageCreateTestWithChannelOrderParam.Success/Intel_R__OpenCL___{{.*}}___UR_IMAGE_CHANNEL_ORDER_ARGB
urMemImageCreateTestWithChannelOrderParam.Success/Intel_R__OpenCL___{{.*}}___UR_IMAGE_CHANNEL_ORDER_ABGR
urMemImageCreateTestWithChannelOrderParam.Success/Intel_R__OpenCL___{{.*}}___UR_IMAGE_CHANNEL_ORDER_INTENSITY
urMemImageCreateTestWithChannelOrderParam.Success/Intel_R__OpenCL___{{.*}}___UR_IMAGE_CHANNEL_ORDER_LUMINANCE
urMemImageCreateTestWithChannelOrderParam.Success/Intel_R__OpenCL___{{.*}}___UR_IMAGE_CHANNEL_ORDER_RX
urMemImageCreateTestWithChannelOrderParam.Success/Intel_R__OpenCL___{{.*}}___UR_IMAGE_CHANNEL_ORDER_RGX
urMemImageCreateTestWithChannelOrderParam.Success/Intel_R__OpenCL___{{.*}}___UR_IMAGE_CHANNEL_ORDER_RGBX
urMemImageCreateTestWithChannelOrderParam.Success/Intel_R__OpenCL___{{.*}}___UR_IMAGE_CHANNEL_ORDER_SRGBA
urMemImageCreateTestWithChannelTypeParam.Success/Intel_R__OpenCL___{{.*}}___UR_IMAGE_CHANNEL_TYPE_UNORM_SHORT_565
urMemImageCreateTestWithChannelTypeParam.Success/Intel_R__OpenCL___{{.*}}___UR_IMAGE_CHANNEL_TYPE_UNORM_SHORT_555
urMemImageCreateTestWithChannelTypeParam.Success/Intel_R__OpenCL___{{.*}}___UR_IMAGE_CHANNEL_TYPE_INT_101010
urMemImageCreateTestWithMemoryTypeParam.Success/Intel_R__OpenCL___{{.*}}___UR_MEM_TYPE_BUFFER
urMemImageCreateTestWithMemoryTypeParam.Success/Intel_R__OpenCL___{{.*}}___UR_MEM_TYPE_IMAGE2D
urMemImageCreateTestWithMemoryTypeParam.Success/Intel_R__OpenCL___{{.*}}___UR_MEM_TYPE_IMAGE3D
urMemImageCreateTestWithMemoryTypeParam.Success/Intel_R__OpenCL___{{.*}}___UR_MEM_TYPE_IMAGE2D_ARRAY
urMemImageCreateTestWithMemoryTypeParam.Success/Intel_R__OpenCL___{{.*}}___UR_MEM_TYPE_IMAGE1D
urMemImageCreateTestWithMemoryTypeParam.Success/Intel_R__OpenCL___{{.*}}___UR_MEM_TYPE_IMAGE1D_ARRAY
urMemImageCreateTestWithMemoryTypeParam.Success/Intel_R__OpenCL___{{.*}}___UR_MEM_TYPE_IMAGE1D_BUFFER
12 changes: 12 additions & 0 deletions test/conformance/memory/urMemBufferCreate.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -48,6 +48,18 @@ UUR_TEST_SUITE_P(urMemBufferCreateWithHostPtrFlagsTest,
UR_MEM_FLAG_USE_HOST_POINTER),
uur::deviceTestWithParamPrinter<ur_mem_flag_t>);

TEST_P(urMemBufferCreateWithHostPtrFlagsTest, SUCCESS) {
uur::raii::Mem host_ptr_buffer = nullptr;
ASSERT_SUCCESS(urMemBufferCreate(context, UR_MEM_FLAG_ALLOC_HOST_POINTER,
4096, nullptr, host_ptr_buffer.ptr()));

ur_buffer_properties_t properties{UR_STRUCTURE_TYPE_BUFFER_PROPERTIES,
nullptr, host_ptr_buffer.ptr()};
uur::raii::Mem buffer = nullptr;
ASSERT_SUCCESS(urMemBufferCreate(context, getParam(), 4096, &properties,
buffer.ptr()));
}

TEST_P(urMemBufferCreateWithHostPtrFlagsTest, InvalidHostPtr) {
uur::raii::Mem buffer = nullptr;
ASSERT_EQ_RESULT(
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92 changes: 92 additions & 0 deletions test/conformance/memory/urMemImageCreate.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -33,6 +33,98 @@ TEST_P(urMemImageCreateTest, Success) {
ASSERT_SUCCESS(urMemRelease(image_handle));
}

using urMemImageCreateTestWithChannelOrderParam =
uur::urContextTestWithParam<ur_image_channel_order_t>;

UUR_TEST_SUITE_P(urMemImageCreateTestWithChannelOrderParam,
::testing::Values(
UR_IMAGE_CHANNEL_ORDER_A, UR_IMAGE_CHANNEL_ORDER_R,
UR_IMAGE_CHANNEL_ORDER_RG, UR_IMAGE_CHANNEL_ORDER_RA,
UR_IMAGE_CHANNEL_ORDER_RGB, UR_IMAGE_CHANNEL_ORDER_RGBA,
UR_IMAGE_CHANNEL_ORDER_BGRA, UR_IMAGE_CHANNEL_ORDER_ARGB,
UR_IMAGE_CHANNEL_ORDER_ABGR,
UR_IMAGE_CHANNEL_ORDER_INTENSITY,
UR_IMAGE_CHANNEL_ORDER_LUMINANCE,
UR_IMAGE_CHANNEL_ORDER_RX, UR_IMAGE_CHANNEL_ORDER_RGX,
UR_IMAGE_CHANNEL_ORDER_RGBX, UR_IMAGE_CHANNEL_ORDER_SRGBA),
uur::deviceTestWithParamPrinter<ur_image_channel_order_t>);

TEST_P(urMemImageCreateTestWithChannelOrderParam, Success) {
ur_image_format_t image_format_with_param{
getParam(), UR_IMAGE_CHANNEL_TYPE_SIGNED_INT32};

ur_mem_handle_t image_handle = nullptr;
ASSERT_SUCCESS(urMemImageCreate(context, UR_MEM_FLAG_READ_WRITE,
&image_format_with_param, &image_desc,
nullptr, &image_handle));
ASSERT_NE(nullptr, image_handle);
ASSERT_SUCCESS(urMemRelease(image_handle));
}

using urMemImageCreateTestWithChannelTypeParam =
uur::urContextTestWithParam<ur_image_channel_type_t>;

UUR_TEST_SUITE_P(
urMemImageCreateTestWithChannelTypeParam,
::testing::Values(
UR_IMAGE_CHANNEL_TYPE_SNORM_INT8, UR_IMAGE_CHANNEL_TYPE_SNORM_INT16,
UR_IMAGE_CHANNEL_TYPE_UNORM_INT8, UR_IMAGE_CHANNEL_TYPE_UNORM_INT16,
UR_IMAGE_CHANNEL_TYPE_UNORM_SHORT_565,
UR_IMAGE_CHANNEL_TYPE_UNORM_SHORT_555, UR_IMAGE_CHANNEL_TYPE_INT_101010,
UR_IMAGE_CHANNEL_TYPE_SIGNED_INT8, UR_IMAGE_CHANNEL_TYPE_SIGNED_INT16,
UR_IMAGE_CHANNEL_TYPE_SIGNED_INT32, UR_IMAGE_CHANNEL_TYPE_UNSIGNED_INT8,
UR_IMAGE_CHANNEL_TYPE_UNSIGNED_INT16,
UR_IMAGE_CHANNEL_TYPE_UNSIGNED_INT32, UR_IMAGE_CHANNEL_TYPE_HALF_FLOAT,
UR_IMAGE_CHANNEL_TYPE_FLOAT),
uur::deviceTestWithParamPrinter<ur_image_channel_type_t>);

TEST_P(urMemImageCreateTestWithChannelTypeParam, Success) {
ur_image_format_t image_format_with_param{UR_IMAGE_CHANNEL_ORDER_RGBA,
getParam()};

ur_mem_handle_t image_handle = nullptr;
ASSERT_SUCCESS(urMemImageCreate(context, UR_MEM_FLAG_READ_WRITE,
&image_format_with_param, &image_desc,
nullptr, &image_handle));
ASSERT_NE(nullptr, image_handle);
ASSERT_SUCCESS(urMemRelease(image_handle));
}

using urMemImageCreateTestWithMemoryTypeParam =
uur::urContextTestWithParam<ur_mem_type_t>;

UUR_TEST_SUITE_P(urMemImageCreateTestWithMemoryTypeParam,
::testing::Values(UR_MEM_TYPE_BUFFER, UR_MEM_TYPE_IMAGE2D,
UR_MEM_TYPE_IMAGE3D,
UR_MEM_TYPE_IMAGE2D_ARRAY,
UR_MEM_TYPE_IMAGE1D,
UR_MEM_TYPE_IMAGE1D_ARRAY,
UR_MEM_TYPE_IMAGE1D_BUFFER),
uur::deviceTestWithParamPrinter<ur_mem_type_t>);

TEST_P(urMemImageCreateTestWithMemoryTypeParam, Success) {
static ur_image_desc_t image_desc_with_param{
UR_STRUCTURE_TYPE_IMAGE_DESC, ///< [in] type of this structure
nullptr, ///< [in][optional] pointer to extension-specific structure
getParam(), ///< [in] memory object type
1, ///< [in] image width
1, ///< [in] image height
1, ///< [in] image depth
1, ///< [in] image array size
0, ///< [in] image row pitch
0, ///< [in] image slice pitch
0, ///< [in] number of MIP levels
0 ///< [in] number of samples
};

ur_mem_handle_t image_handle = nullptr;
ASSERT_SUCCESS(urMemImageCreate(context, UR_MEM_FLAG_READ_WRITE,
&image_format, &image_desc_with_param,
nullptr, &image_handle));
ASSERT_NE(nullptr, image_handle);
ASSERT_SUCCESS(urMemRelease(image_handle));
}

TEST_P(urMemImageCreateTest, InvalidNullHandleContext) {
ur_mem_handle_t image_handle = nullptr;
ASSERT_EQ_RESULT(UR_RESULT_ERROR_INVALID_NULL_HANDLE,
Expand Down
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