[HIP] Revert add prefetch for USM hip allocations a6b8fa66b537753415d24076f… #936
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hdelan
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Has this been done through |
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Yes it was but I think maybe there was some conflict so added the second commit. Have squashed the second commit so just one commit now |
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…f atomic builtin (#11876) 1. Fix a race condition in cmpxchg 2. Change `atomic_xor` to use a CAS loop instead of atomic builtin. This is needed to merge this in UR oneapi-src/unified-runtime#936 so that perf regression can be fixed. The long term fix is to use a compiler flag to choose between builtin and safe CAS implementation, but talks upstream may take some time to figure out the details. See llvm/llvm-project#69229
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This needs an intel/llvm testing PR with passing checks before we can merge here. |
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steffenlarsen
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Nov 28, 2023
Run CI for oneapi-src/unified-runtime#936 Depends on #11718 merging first. --------- Co-authored-by: Kenneth Benzie (Benie) <k.benzie@codeplay.com>
callumfare
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Run CI for oneapi-src/unified-runtime#936 Depends on intel#11718 merging first. --------- Co-authored-by: Kenneth Benzie (Benie) <k.benzie@codeplay.com>
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intel/llvm#10430 caused a performance regression. The new way to ensure safety when using xor atomics is by changing the xor impl to use a CAS loop. See here intel/llvm#11876.
Tested in intel/llvm#11893.