cache_subsystem: 🐛 Fix AXI read len (#2696)

AxiRdBlenDcache -> AxiRdBlenIcache
openhwgroup · Jan 8, 2025 · 5a484fc · 5a484fc
1 parent 6268d28
commit 5a484fc
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/core/cache_subsystem/wt_axi_adapter.sv b/core/cache_subsystem/wt_axi_adapter.sv
@@ -178,7 +178,7 @@ module wt_axi_adapter
       axi_rd_addr = {{CVA6Cfg.AxiAddrWidth - CVA6Cfg.PLEN{1'b0}}, icache_data.paddr};
       axi_rd_size = MaxNumWords[2:0];  // always request max number of words in case of ifill
       if (!icache_data.nc) begin
-        axi_rd_blen = AxiRdBlenDcache[AxiBlenWidth-1:0];
+        axi_rd_blen = AxiRdBlenIcache[AxiBlenWidth-1:0];
       end
     end