[CV32A65X] Update PMPADDRn spec to make bit 0 ROCST 0. Update config …

…files. (#2651) Update CV32A65X-annotated privileged ISA specification to reflect the fact that with PMP granularity 8 and only supported PMP address matching modes being OFF and TOR, bit 0 of the pmpaddr0..pmpaddr7 registers can be safely made read-only zero. Update riscv-config specifications and its generated files accordingly.
openhwgroup · Dec 9, 2024 · ed89c71 · ed89c71
1 parent 5ff6b2d
commit ed89c71
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Showing 6 changed files with 31 additions and 25 deletions.
diff --git a/config/gen_from_riscv_config/cv32a65x/csr/csr.adoc b/config/gen_from_riscv_config/cv32a65x/csr/csr.adoc
@@ -334,7 +334,7 @@ Description:: Physical memory protection address register
 |===
 | Bits | Field Name | Reset Value | Type | Legal Values | Description
 
-| [31:0] | PMPADDR[I] | 0x00000000 | WARL | 0x00000000 - 0xFFFFFFFF | Physical memory protection address register 
+| [31:0] | PMPADDR[I] | 0x00000000 | WARL | masked: & 0xFFFFFFFE \| 0x0 | Physical memory protection address register 
 |===
 
 [[_PMPADDR8-63]]

diff --git a/config/gen_from_riscv_config/cv32a65x/csr/csr.rst b/config/gen_from_riscv_config/cv32a65x/csr/csr.rst
@@ -418,13 +418,13 @@ PMPCFG[0-1]
 +---------+----------------+---------------+--------+----------------------+------------------------+
 | Bits    | Field Name     | Reset Value   | Type   | Legal Values         | Description            |
 +=========+================+===============+========+======================+========================+
-| [7:0]   | PMP[I*4 +0]CFG | 0x0           | WARL   | masked: & 0x8f | 0x0 | pmp configuration bits |
+| [7:0]   | PMP[I*4 +0]CFG | 0x0           | WARL   | masked: & 0x8f \| 0x0 | pmp configuration bits |
 +---------+----------------+---------------+--------+----------------------+------------------------+
-| [15:8]  | PMP[I*4 +1]CFG | 0x0           | WARL   | masked: & 0x8f | 0x0 | pmp configuration bits |
+| [15:8]  | PMP[I*4 +1]CFG | 0x0           | WARL   | masked: & 0x8f \| 0x0 | pmp configuration bits |
 +---------+----------------+---------------+--------+----------------------+------------------------+
-| [23:16] | PMP[I*4 +2]CFG | 0x0           | WARL   | masked: & 0x8f | 0x0 | pmp configuration bits |
+| [23:16] | PMP[I*4 +2]CFG | 0x0           | WARL   | masked: & 0x8f \| 0x0 | pmp configuration bits |
 +---------+----------------+---------------+--------+----------------------+------------------------+
-| [31:24] | PMP[I*4 +3]CFG | 0x0           | WARL   | masked: & 0x8f | 0x0 | pmp configuration bits |
+| [31:24] | PMP[I*4 +3]CFG | 0x0           | WARL   | masked: & 0x8f \| 0x0 | pmp configuration bits |
 +---------+----------------+---------------+--------+----------------------+------------------------+
 
 
@@ -462,7 +462,7 @@ PMPADDR[0-7]
 +--------+--------------+---------------+--------+-------------------------+---------------------------------------------+
 | Bits   | Field Name   | Reset Value   | Type   | Legal Values            | Description                                 |
 +========+==============+===============+========+=========================+=============================================+
-| [31:0] | PMPADDR[I]   | 0x00000000    | WARL   | 0x00000000 - 0xFFFFFFFF | Physical memory protection address register |
+| [31:0] | PMPADDR[I]   | 0x00000000    | WARL   | masked: & 0xFFFFFFFE \| 0x00000000 | Physical memory protection address register |
 +--------+--------------+---------------+--------+-------------------------+---------------------------------------------+
 
 

diff --git a/config/gen_from_riscv_config/cv32a65x/spike/spike.yaml b/config/gen_from_riscv_config/cv32a65x/spike/spike.yaml
@@ -44,6 +44,14 @@ spike_param_tree:
       tdata2_accessible: 0
       tdata3_accessible: 0
       tselect_accessible: 0
+      pmpaddr0_write_mask: 0xFFFFFFFE
+      pmpaddr1_write_mask: 0xFFFFFFFE
+      pmpaddr2_write_mask: 0xFFFFFFFE
+      pmpaddr3_write_mask: 0xFFFFFFFE
+      pmpaddr4_write_mask: 0xFFFFFFFE
+      pmpaddr5_write_mask: 0xFFFFFFFE
+      pmpaddr6_write_mask: 0xFFFFFFFE
+      pmpaddr7_write_mask: 0xFFFFFFFE
       mhartid: 0
       mvendorid_override_mask : 0xFFFFFFFF
       mvendorid_override_value: 1538

diff --git a/config/riscv-config/cv32a65x/generated/isa_gen.yaml b/config/riscv-config/cv32a65x/generated/isa_gen.yaml
@@ -3165,7 +3165,7 @@ hart0:
                 warl:
                     dependency_fields: []
                     legal:
-                      - pmpaddr0[31:0] in [0x00000000:0xFFFFFFFF]
+                      - pmpaddr0[31:0] bitmask [0xFFFFFFFE, 0x00000000]
                     wr_illegal:
                       - unchanged
             fields: []
@@ -3186,7 +3186,7 @@ hart0:
                 warl:
                     dependency_fields: []
                     legal:
-                      - pmpaddr1[31:0] in [0x00000000:0xFFFFFFFF]
+                      - pmpaddr1[31:0] bitmask [0xFFFFFFFE, 0x00000000]
                     wr_illegal:
                       - unchanged
             fields: []
@@ -3207,7 +3207,7 @@ hart0:
                 warl:
                     dependency_fields: []
                     legal:
-                      - pmpaddr2[31:0] in [0x00000000:0xFFFFFFFF]
+                      - pmpaddr2[31:0] bitmask [0xFFFFFFFE, 0x00000000]
                     wr_illegal:
                       - unchanged
             fields: []
@@ -3228,7 +3228,7 @@ hart0:
                 warl:
                     dependency_fields: []
                     legal:
-                      - pmpaddr3[31:0] in [0x00000000:0xFFFFFFFF]
+                      - pmpaddr3[31:0] bitmask [0xFFFFFFFE, 0x00000000]
                     wr_illegal:
                       - unchanged
             fields: []
@@ -3249,7 +3249,7 @@ hart0:
                 warl:
                     dependency_fields: []
                     legal:
-                      - pmpaddr4[31:0] in [0x00000000:0xFFFFFFFF]
+                      - pmpaddr4[31:0] bitmask [0xFFFFFFFE, 0x00000000]
                     wr_illegal:
                       - unchanged
             fields: []
@@ -3270,7 +3270,7 @@ hart0:
                 warl:
                     dependency_fields: []
                     legal:
-                      - pmpaddr5[31:0] in [0x00000000:0xFFFFFFFF]
+                      - pmpaddr5[31:0] bitmask [0xFFFFFFFE, 0x00000000]
                     wr_illegal:
                       - unchanged
             fields: []
@@ -3291,7 +3291,7 @@ hart0:
                 warl:
                     dependency_fields: []
                     legal:
-                      - pmpaddr6[31:0] in [0x00000000:0xFFFFFFFF]
+                      - pmpaddr6[31:0] bitmask [0xFFFFFFFE, 0x00000000]
                     wr_illegal:
                       - unchanged
             fields: []
@@ -3312,7 +3312,7 @@ hart0:
                 warl:
                     dependency_fields: []
                     legal:
-                      - pmpaddr7[31:0] in [0x00000000:0xFFFFFFFF]
+                      - pmpaddr7[31:0] bitmask [0xFFFFFFFE, 0x00000000]
                     wr_illegal:
                       - unchanged
             fields: []

diff --git a/config/riscv-config/cv32a65x/spec/isa_spec.yaml b/config/riscv-config/cv32a65x/spec/isa_spec.yaml
@@ -1440,7 +1440,7 @@ hart0: &hart0
                 warl:
                     dependency_fields: []
                     legal:
-                      - pmpaddr0[31:0] in [0x00000000:0xFFFFFFFF]
+                      - pmpaddr0[31:0] bitmask [0xFFFFFFFE, 0x00000000]
                     wr_illegal:
                       - unchanged
         rv64:
@@ -1453,7 +1453,7 @@ hart0: &hart0
                 warl:
                     dependency_fields: []
                     legal:
-                      - pmpaddr1[31:0] in [0x00000000:0xFFFFFFFF]
+                      - pmpaddr1[31:0] bitmask [0xFFFFFFFE, 0x00000000]
                     wr_illegal:
                       - unchanged
         rv64:
@@ -1466,7 +1466,7 @@ hart0: &hart0
                 warl:
                     dependency_fields: []
                     legal:
-                      - pmpaddr2[31:0] in [0x00000000:0xFFFFFFFF]
+                      - pmpaddr2[31:0] bitmask [0xFFFFFFFE, 0x00000000]
                     wr_illegal:
                       - unchanged
         rv64:
@@ -1479,7 +1479,7 @@ hart0: &hart0
                 warl:
                     dependency_fields: []
                     legal:
-                      - pmpaddr3[31:0] in [0x00000000:0xFFFFFFFF]
+                      - pmpaddr3[31:0] bitmask [0xFFFFFFFE, 0x00000000]
                     wr_illegal:
                       - unchanged
         rv64:
@@ -1492,7 +1492,7 @@ hart0: &hart0
                 warl:
                     dependency_fields: []
                     legal:
-                      - pmpaddr4[31:0] in [0x00000000:0xFFFFFFFF]
+                      - pmpaddr4[31:0] bitmask [0xFFFFFFFE, 0x00000000]
                     wr_illegal:
                       - unchanged
         rv64:
@@ -1505,7 +1505,7 @@ hart0: &hart0
                 warl:
                     dependency_fields: []
                     legal:
-                      - pmpaddr5[31:0] in [0x00000000:0xFFFFFFFF]
+                      - pmpaddr5[31:0] bitmask [0xFFFFFFFE, 0x00000000]
                     wr_illegal:
                       - unchanged
         rv64:
@@ -1518,7 +1518,7 @@ hart0: &hart0
                 warl:
                     dependency_fields: []
                     legal:
-                      - pmpaddr6[31:0] in [0x00000000:0xFFFFFFFF]
+                      - pmpaddr6[31:0] bitmask [0xFFFFFFFE, 0x00000000]
                     wr_illegal:
                       - unchanged
         rv64:
@@ -1531,7 +1531,7 @@ hart0: &hart0
                 warl:
                     dependency_fields: []
                     legal:
-                      - pmpaddr7[31:0] in [0x00000000:0xFFFFFFFF]
+                      - pmpaddr7[31:0] bitmask [0xFFFFFFFE, 0x00000000]
                     wr_illegal:
                       - unchanged
         rv64:

diff --git a/docs/riscv-isa/src/machine.adoc b/docs/riscv-isa/src/machine.adoc
@@ -4346,9 +4346,7 @@ ifdef::archi-CVA6[]
 [{ohg-config}] The PMP grain is 8 bytes (latexmath:[$2^{G+2}$] with G = 1)
 and must be the same across all PMP regions.
 As latexmath:[${\tt pmpcfg}_i$].A[1] is always clear, i.e. the mode is OFF or TOR,
-then bit latexmath:[${\tt pmpaddr}_i$][0] read as zero. Bit
-latexmath:[${\tt pmpaddr}_i$][0] does not affect the TOR address-matching
-logic.
+then bit latexmath:[${\tt pmpaddr}_i$][0] is read-only zero.
 endif::[]
 
 ifeval::[{note} == true]