Updated mod files to snap

oprecomp · Sep 26, 2019 · bfffcba · bfffcba
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diff --git a/README.md b/README.md
@@ -29,7 +29,7 @@ This version serves as an example for the SNAP community and it is not including
 
   * Clone the directory on you SNAP's action folder
 ```Bash
-git clone https://github.ibm.com/DID/hls_blstm <SNAP_ROOT>/actions/hls_blstm
+git clone https://github.com/oprecomp/HLS_BLSTM.git <SNAP_ROOT>/actions/hls_blstm
 ```
   * Add the related section of HLS_BLSTM into SNAP, by replacing some files. A script is batching the copying.
   ```Bash
@@ -52,6 +52,11 @@ git clone https://github.ibm.com/DID/hls_blstm <SNAP_ROOT>/actions/hls_blstm
   cd <SNAP_ROOT>
   make snap_config (In the ncurses menu select HLS_BLSTM)
   ```
+  * Latest supported [snap version:](https://github.com/open-power/snap/commit/2fb8fb85f9a6ec7bdbf837522c8ce839e87de281)
+  ```Bash
+  cd <SNAP_ROOT>
+  git checkout 2fb8fb85f9a6ec7bdbf837522c8ce839e87de281
+  ```
 
 * Run the software version (either on x86 or POWER8/9)
 ```Bash
@@ -95,6 +100,7 @@ sudo SNAP_CONFIG=FPGA ./snap_blstm -i ../data/samples_1/ -g ../data/gt_1/ -C0
 As of now, the following FPGA card has been used with HLS_BLSTM:
 
 *  [Alpha-Data ADM-PCIE-KU3](http://www.alpha-data.com/dcp/products.php?product=adm-pcie-ku3)
+*  [Alpha-Data AAADM-PCIE-9V3](https://www.alpha-data.com/dcp/products.php?product=adm-pcie-9v3)
 
 ### ii. Development
 #### a) SNAP

diff --git a/snap_modification_files/ActionTypes.md b/snap_modification_files/ActionTypes.md
@@ -20,9 +20,14 @@ IBM | 10.14.10.08 | 10.14.10.08 | HLS Hello World
 IBM | 10.14.10.09 | 10.14.10.09 | HLS Latency Evaluation
 IBM | 10.14.10.0A | 10.14.10.0A | HLS WED/STATUS Sharing and MatrixMultiply
 IBM | 10.14.10.0B | 10.14.10.0B | HLS Decimal multiplication
-IBM | 10.14.10.0C | 10.14.FF.FF | Reserved for IBM Actions
+IBM | 10.14.10.0C | 10.14.10.0C | HLS Scatter-Gather
+IBM | 10.14.10.0D | 10.14.10.0D | HLS Image filter
+IBM | 10.14.10.0E | 10.14.10.0E | HLS Vector Generator
+IBM | 10.14.10.0F | 10.14.10.0F | HLS Parallel Memcpy
+IBM | 10.14.10.10 | 10.14.FF.FF | Reserved for IBM Actions
 MLE | 22.DB.00.01 | 22.DB.00.01 | HDL 10G Ethernet TCP/UDP/IP Accelerator Demo
 MLE | 22.DB.00.02 | 22.DB.00.02 | HDL 25G Ethernet TCP/UDP/IP Accelerator Demo
+HPI | FB.06.00.01 | FB.06.00.01 | Metal FS
 Reserved | FF.FF.00.00 | FF.FF.FF.FF | Reserved
 
 ### How to apply for a new Action Type

diff --git a/snap_modification_files/Kconfig b/snap_modification_files/Kconfig
@@ -49,11 +49,12 @@ choice
 		select S121B
 		select DISABLE_NVME
 		help
-		  Semptian NSA121B has ethernet and 8GB DDR4 SDRAM. Uses Xilinx FPGA XCKU115.
+            Semptian NSA121B has ethernet and 8GB DDR4 SDRAM. Uses Xilinx FPGA XCKU115.
 
-       config N250SP
+    config N250SP
 		bool "CAPI2.0: Nallatech 250S+ with 4GB DDR4 SDRAM, NVMe and Xilinx KU15P FPGA"
 		select CAPI20
+		select DISABLE_NVME
 		help
 		  Nallatech 250S+ card originally used for CAPI Flash using NVMe
 		  storage. Uses Xilinx FPGA.
@@ -72,12 +73,27 @@ choice
 		help
 		  Semptian NSA241 Card with Ethernet, 8GB DDR4 SDRAM and Xilinx VU9P FPGA.
 
+	config U200
+		bool "CAPI2.0: Xilinx U200 board (in development)"
+		select CAPI20
+		select DISABLE_NVME
+		help
+		  Xilinx U200 FPGA board (IN DEVELOPMENT).
+
 	config FX609
 		bool "CAPI2.0: Flyslice FX609 Card with Ethernet, 8GB DDR4 SDRAM and Xilinx VU9P FPGA"
 		select CAPI20
 		select DISABLE_NVME
 		help
 		  Flyslice FX609 Card with Ethernet, 8GB DDR4 SDRAM and Xilinx VU9P FPGA.
+
+        config AD9V3
+                bool "CAPI2.0: AlphaData AD9V3 with 2x100GbE, 8GB DDR4 SDRAM and Xilinx VU3P-2 FPGA"
+                select CAPI20
+                select DISABLE_NVME
+                help
+                  AlphaData AD9V3 with 2x100GbE, 8GB DDR4 SDRAM and Xilinx VU3P-2 FPGA in CAPI2.0 mode
+
 endchoice
 
 config FPGACARD
@@ -90,19 +106,21 @@ config FPGACARD
 	default "RCXVUP" if RCXVUP
 	default "FX609"  if FX609
 	default "S241"   if S241
+	default "U200"   if U200
+        default "AD9V3"  if AD9V3
 
 config FLASH_INTERFACE
 	string
 	default "BPIx16" if S121B_BPIx16 || N250S || N250SP || ADKU3 || AD8K5
-	default "SPIx4"  if S121B_SPIx4 || FX609 || S241
-	default "SPIx8"  if RCXVUP
+	default "SPIx4"  if S121B_SPIx4 || FX609 || S241 || U200
+	default "SPIx8"  if RCXVUP || AD9V3
 
 #FLASH_SIZE: in MB, will be used by build_mcs.tcl
 config FLASH_SIZE
 	string
 	default 256 if S121B_SPIx4  || RCXVUP || S241
-	default 128 if S121B_BPIx16 || N250SP || AD8K5 || ADKU3 || FX609
-	default 64  if N250S
+	default 128 if S121B_BPIx16 || N250SP || AD8K5 || ADKU3 || FX609 || U200
+	default 64  if N250S || AD9V3
 
 #FLASH_FACTORYADDR: For all cards, factory address is 0x0
 config FLASH_FACTORYADDR
@@ -114,9 +132,10 @@ config FLASH_FACTORYADDR
 config FLASH_USERADDR
 	string
 	default 0x01000000 if N250S || ADKU3
-	default 0x02000000 if S121B_BPIx16 || AD8K5 || N250SP
+	default 0x02000000 if S121B_BPIx16 || AD8K5 || N250SP || AD9V3
 	default 0x04000000 if FX609
 	default 0x08000000 if S121B_SPIx4 || RCXVUP || S241
+	default 0x01002000 if U200
 
 
 config S121B
@@ -140,6 +159,12 @@ config FPGACHIP
 	default "xcvu9p-flgb2104-2l-e-es1" if RCXVUP
 	default "xcvu9p-fsgd2104-2l-e" if FX609
 	default "xcvu9p-flgb2104-2l-e" if S241
+	default "xcvu3p-ffvc1517-2-i"  if AD9V3
+	default "xcu200-fsgd2104-2-e"  if U200
+
+config FPGABOARD
+	string
+	default "xilinx.com:au200:part0:1.0" if U200 
 
 config NUM_OF_ACTIONS
 	int
@@ -169,19 +194,17 @@ choice
 		  Please remember to set the environment variable "ACTION_ROOT"
 		  in snap_env.sh to the directory of the action source code.
 
-        config HDL_EXAMPLE
-                bool "HDL Example"
-
 	config HDL_HELLOWORLD
 		bool "HDL HelloWorld (Minimum example written in Verilog)"
                 help
                    This is the simplest example to start with:
-                   - Reading text from the server memory
-                   - Processing changing case of the text
-                   - Writing back the text to the server memory
+                    SNAP String Match (Regular Expression Match) Tool
                 select DISABLE_SDRAM_AND_BRAM
                 select DISABLE_NVME
 
+        config HDL_EXAMPLE
+                bool "HDL Example"
+
 	config HDL_NVME_EXAMPLE
 		bool "HDL NVMe Example"
 		depends on N250S
@@ -197,7 +220,7 @@ choice
 		  in snap_env.sh to the directory of the action source code.
 
 	config HLS_HELLOWORLD
-		bool "HLS HelloWorld"
+		bool "HLS HelloWorld (Minimum example written in C)"
 		help
 		  This is the simplest example to start with:
 		  - Reading text from the server memory
@@ -290,7 +313,7 @@ choice
 		select ENABLE_HLS_SUPPORT
 		select DISABLE_SDRAM_AND_BRAM
 		select DISABLE_NVME
-
+	
 	config HLS_MM_TEST
 		bool "HLS WED/STATUS Sharing and MatrixMultiply"
 		help
@@ -307,7 +330,7 @@ choice
 	config HLS_DECIMAL_MULT
 		bool "HLS Decimal Multiplication"
 		help
-		  This example will help user understanding how to handle decimal numbers::
+		  This example will help user understanding how to handle decimal numbers:
 		  - Read a value from the server memory
 		  - Convert this value to a double or a float type
 		  - Process an operation with decimal numbers such as a multiplication
@@ -318,17 +341,49 @@ choice
 		select DISABLE_SDRAM_AND_BRAM
 		select DISABLE_NVME
 
-	config HLS_BLSTM
-		bool "HLS BLSTM"
+	config HLS_SCATTER_GATHER
+		bool "HLS Scatter Gather (CAPI2.0 only)"
 		help
-		  This is an OCR application using the BSLTM neural network
+		  This example will help user understanding how to optimize code for 
+		   scatter gather memory access. It will show how Software and Hardware 
+		   share WED (Work Element Descriptor) and STATUS in host memory.
+		  This can be used as a benchmark to see how CAPI help reduce the 
+		   data moving latency when the data are scattered everywhere in RAM.
+		  This example is written in C and compiled with HLS
+		select ENABLE_HLS_SUPPORT
+		select DISABLE_SDRAM_AND_BRAM
+		select DISABLE_NVME
+		select ENABLE_ACTION_CLK_DERATE
+
+    config HLS_VECTOR_GENERATOR
+		bool "HLS Vector Generator example"
+        help
+            This is a simple example that generates a vector from FPGA:
+            - HOST calls an FPGA action to generate a vector of size N
+            This example is written in C and compiled with HLS
+        select ENABLE_HLS_SUPPORT
+        select DISABLE_SDRAM_AND_BRAM
+        select DISABLE_NVME
+
+    config HLS_PARALLEL_MEMCPY
+		bool "HLS Parallel Memcpy example"
+        help
+            This example is written in C and compiled with HLS
+        select ENABLE_HLS_SUPPORT
+        select DISABLE_SDRAM_AND_BRAM
+        select DISABLE_NVME
+
+    config HLS_BLSTM
+		bool "HLS BLSTM"
+	help
+	    This is an OCR application using the BSLTM neural network
 		  - Reads a directory with scanned png files of documents from the server memory
 		  - Converts to ASCII character using BLSTM inference (pre-trained model)
 		  - Write back the result to the server memory
 		  This example is written in C++ and compiled with HLS
-		select ENABLE_HLS_SUPPORT
-		select DISABLE_SDRAM_AND_BRAM
-		select DISABLE_NVME
+	select ENABLE_HLS_SUPPORT
+	select DISABLE_SDRAM_AND_BRAM
+	select DISABLE_NVME
 
 endchoice
 
@@ -363,11 +418,14 @@ config ENABLE_SDRAM
 	  This option enables the on-card SDRAM.
 	  SNAP supports 8GB DDR3 SDRAM on the AlphaData KU3 card,
 	                4GB DDR4 SDRAM on the Nallatech 250S card,
+			4GB DDR4 SDRAM on the Nallatech 250S+ card,
 	                8GB DDR4 SDRAM on the Semptian NSA121B card,
-	                8GB DDR4 SDRAM (out of 16GB) on the AlphaData 8K5 card
+	                8GB DDR4 SDRAM on the AlphaData 8K5 card
 	                8GB DDR4 SDRAM on the Semptian NSA241 card
 	                8GB DDR4 SDRAM on the ReflexCES XpressVUP card and
 	                8GB DDR4 SDRAM on the Flyslice FX609 card.
+	                8GB DDR4 SDRAM on the AlphaData AD9V3 card.
+	                16GB DDR4 SDRAM on the Xilinx U200 card.
 
 config SDRAM_USED
 	string
@@ -399,7 +457,7 @@ config DDR3_USED
 config ENABLE_DDR4
 	bool
 	default y
-	depends on (ENABLE_SDRAM && (N250S || S121B || N250SP || AD8K5 || RCXVUP || FX609 || S241))
+	depends on (ENABLE_SDRAM && (N250S || S121B || N250SP || AD8K5 || RCXVUP || FX609 || S241 || AD9V3 || U200))
 
 config DDR4_USED
 	string
@@ -513,6 +571,40 @@ config USE_PRFLOW
 	default "TRUE" if ENABLE_PRFLOW
 	default "FALSE" if ! ENABLE_PRFLOW
 
+config ENABLE_ACTION_CLK_DERATE
+	bool "Derate by 10% the Action clock used for synthesizing the FPGA"
+	default n
+	depends on CAPI20
+	help
+	  By derating the action clock, the routing in the FPGA may be easier.
+	  Default clock is 250MHz (4ns).
+	  This option will set the clock to 225MHz (5ns) for the routing phase but keep
+	  the default clock (4ns) for HLS to better work.
+
+config FPGA_ACTION_CLK
+	string
+	default "225MHZ"  if ENABLE_ACTION_CLK_DERATE
+	default "250MHZ" if ! ENABLE_ACTION_CLK_DERATE
+
+config ENABLE_USER_HLS_ACTION_CLK
+	bool "Constraint HLS tool with a specific HLS clock"
+	default n
+	depends on CAPI20
+	help
+	  Default clock is 250MHz (4ns).
+	  By changing the value of the HLS action clock, user can
+	  overconstrain the HLS synthesis and get different synthesis results.
+	  This option enables or disables in the file snap_env.sh the use of 
+          the variable HLS_CLOCK_PERIOD_CONSTRAINT="4ns"
+	  This modification will not change the frequency used to synthesize the
+          whole FPGA, but will disable the automatic timing violation testing done
+          after the HLS synthesis.
+
+config HLS_CLK_CONSTRAINT
+	string
+	default "TRUE"  if ENABLE_USER_HLS_ACTION_CLK
+	default "FALSE" if ! ENABLE_USER_HLS_ACTION_CLK
+
 config ENABLE_ILA
 	bool "Enable ILA Debug (Definition of $ILA_SETUP_FILE required)"
 	depends on ! ENABLE_PRFLOW

diff --git a/snap_modification_files/Makefile b/snap_modification_files/Makefile
@@ -36,9 +36,13 @@ $(error Please make sure that $$SNAP_ROOT is set up correctly.)
 endif
 endif
 
-all: clean dirs copy_snap_files copy_vivado_files
+all: clean checkgit dirs copy_snap_files copy_vivado_files
 
-dirs: 
+checkgit: 
+	cd ../../../; \
+	git checkout 2fb8fb85f9a6ec7bdbf837522c8ce839e87de281
+
+dirs:
 	mkdir -p ../sw/third-party
 	mkdir -p ../sw/third-party/xilinx
 
@@ -61,5 +65,12 @@ copy_vivado_files:
 	cp -f ${XILINX_VIVADO}/include/ap_int.h ../sw/third-party/xilinx/ | true
 	cp -f ${XILINX_VIVADO}/include/ap_int.h ../sw/third-party/xilinx/ | true
 	cp -f -r ${XILINX_VIVADO}/include/etc/ ../sw/third-party/xilinx/ | true
-
+	cp -f ${XILINX_VIVADO}/include/ap_decl.h ../sw/third-party/xilinx/ | true
+	cp -f ${XILINX_VIVADO}/include/ap_int_base.h ../sw/third-party/xilinx/ | true
+	cp -f ${XILINX_VIVADO}/include/ap_int_ref.h ../sw/third-party/xilinx/ | true
+	cp -f ${XILINX_VIVADO}/include/ap_fixed.h ../sw/third-party/xilinx/ | true
+	cp -f ${XILINX_VIVADO}/include/ap_fixed_base.h ../sw/third-party/xilinx/ | true
+	cp -f ${XILINX_VIVADO}/include/ap_fixed_ref.h ../sw/third-party/xilinx/ | true
+	cp -f ${XILINX_VIVADO}/include/ap_fixed_special.h ../sw/third-party/xilinx/ | true
+
 clean: