[AArch64] Check for exact size when finding 1's for CMLE. (llvm#76452)

This is a fix for the second half of llvm#75822, where smaller constants can also be bitcast to larger types. We should be checking the size is what we expect it to be when matching ones.
pratlucas · Jan 2, 2024 · d714be9 · d714be9
1 parent baf8a39
commit d714be9
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Showing 2 changed files with 6 additions and 6 deletions.
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -13715,11 +13715,10 @@ static SDValue EmitVectorComparison(SDValue LHS, SDValue RHS,
  bool IsCnst = BVN && BVN->isConstantSplat(SplatValue, SplatUndef,
  SplatBitSize, HasAnyUndefs);
 
- bool IsSplatUniform =
- SrcVT.getVectorElementType().getSizeInBits() >= SplatBitSize;
- bool IsZero = IsCnst && SplatValue == 0 && IsSplatUniform;
- bool IsOne = IsCnst && SplatValue == 1 && IsSplatUniform;
- bool IsMinusOne = IsCnst && SplatValue.isAllOnes() && IsSplatUniform;
+ bool IsZero = IsCnst && SplatValue == 0;
+ bool IsOne =
+ IsCnst && SrcVT.getScalarSizeInBits() == SplatBitSize && SplatValue == 1;
+ bool IsMinusOne = IsCnst && SplatValue.isAllOnes();
 
  if (SrcVT.getVectorElementType().isFloatingPoint()) {
  switch (CC) {

diff --git a/llvm/test/CodeGen/AArch64/neon-compare-instructions.ll b/llvm/test/CodeGen/AArch64/neon-compare-instructions.ll
@@ -1792,7 +1792,8 @@ define <8 x i1> @not_cmle8xi8(<8 x i8> %0) {
 define <4 x i1> @not_cmle16xi8(<4 x i32> %0) {
 ; CHECK-SD-LABEL: not_cmle16xi8:
 ; CHECK-SD: // %bb.0: // %entry
-; CHECK-SD-NEXT: cmle v0.4s, v0.4s, #0
+; CHECK-SD-NEXT: movi v1.8h, #1
+; CHECK-SD-NEXT: cmgt v0.4s, v1.4s, v0.4s
 ; CHECK-SD-NEXT: xtn v0.4h, v0.4s
 ; CHECK-SD-NEXT: ret
 ;