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Fix clippy complaints
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ed255 committed May 2, 2022
1 parent 524b2bd commit fa29e26
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Showing 2 changed files with 66 additions and 57 deletions.
8 changes: 4 additions & 4 deletions zkevm-circuits/src/tx_circuit.rs
Original file line number Diff line number Diff line change
Expand Up @@ -147,7 +147,7 @@ fn tx_to_sign_data(tx: &Transaction, chain_id: u64) -> Result<SignData, Error> {
.append(&tx.nonce)
.append(&tx.gas_price)
.append(&tx.gas)
.append(&tx.to.unwrap_or(Address::zero()))
.append(&tx.to.unwrap_or_else(Address::zero))
.append(&tx.value)
.append(&tx.data.0)
.append(&chain_id)
Expand Down Expand Up @@ -337,13 +337,13 @@ impl<F: Field, const MAX_TXS: usize, const MAX_CALLDATA: usize> Circuit<F>
offset += 1;
// Assign al Tx fields except for call data
let tx_default = Transaction::default();
for i in 0..MAX_TXS {
// for i in 0..MAX_TXS
for (i, assigned_sig_verif) in assigned_sig_verifs.iter().enumerate() {
let tx = if i < self.txs.len() {
&self.txs[i]
} else {
&tx_default
};
let assigned_sig_verif = &assigned_sig_verifs[i];
let address_cell = assigned_sig_verif.address.cell();
let msg_hash_rlc_cell = assigned_sig_verif.msg_hash_rlc.cell();
let msg_hash_rlc_value = assigned_sig_verif.msg_hash_rlc.value();
Expand All @@ -367,7 +367,7 @@ impl<F: Field, const MAX_TXS: usize, const MAX_CALLDATA: usize> Circuit<F>
(
TxFieldTag::CalleeAddress,
tx.to
.unwrap_or(Address::zero())
.unwrap_or_else(Address::zero)
.to_scalar()
.expect("tx.to too big"),
),
Expand Down
115 changes: 62 additions & 53 deletions zkevm-circuits/src/tx_circuit/sign_verify.rs
Original file line number Diff line number Diff line change
Expand Up @@ -95,7 +95,7 @@ fn copy_integer<F: FieldExt, W: WrongExt>(
|| format!("{} limb {}", name, i),
dst[i],
offset,
|| limb.value().clone().ok_or(Error::Synthesis),
|| limb.value().ok_or(Error::Synthesis),
)?;
region.constrain_equal(assigned_cell.cell(), limb.cell())?;
}
Expand All @@ -116,7 +116,7 @@ fn copy_integer_bytes_le<F: FieldExt>(
|| format!("{} byte {}", name, i),
dst[i],
offset,
|| byte.value().clone().ok_or(Error::Synthesis),
|| byte.value().ok_or(Error::Synthesis),
)?;
region.constrain_equal(assigned_cell.cell(), byte.cell())?;
}
Expand Down Expand Up @@ -246,7 +246,7 @@ impl<F: FieldExt> SignVerifyConfig<F> {
let pk_hash = pk_hash.map(|c| meta.query_advice(c, Rotation::cur()));
let pk_hash_rlc =
RandomLinearCombination::random_linear_combine_expr(pk_hash, &power_of_randomness);
table_map.push((selector.clone() * pk_hash_rlc, keccak_output_rlc));
table_map.push((selector * pk_hash_rlc, keccak_output_rlc));

table_map
});
Expand Down Expand Up @@ -361,8 +361,8 @@ impl<F: FieldExt> SignVerifyConfig<F> {
for aux in &auxs {
let KeccakAux { input, output } = aux;
let input_rlc =
RandomLinearCombination::random_linear_combine(input.clone(), randomness);
let output_rlc = Word::random_linear_combine(output.clone(), randomness);
RandomLinearCombination::random_linear_combine(*input, randomness);
let output_rlc = Word::random_linear_combine(*output, randomness);
self.keccak_assign_row(
&mut region,
offset,
Expand Down Expand Up @@ -438,7 +438,7 @@ fn integer_to_bytes_le<F: FieldExt, W: WrongExt>(
})?;
let int_le: [AssignedValue<F>; 32] = int_le.try_into().expect("vec to array of size 32");
for (j, positions) in [1..9, 1..9, 1..9, 1..5].iter().enumerate() {
let mut acc = int_le[j * 9].clone();
let mut acc = int_le[j * 9];
for i in positions.clone() {
let shifted = main_gate.mul(ctx, &int_le[j * 9 + i], &pows_256[i - 1])?;
acc = main_gate.add(ctx, &acc, &shifted)?;
Expand All @@ -448,8 +448,16 @@ fn integer_to_bytes_le<F: FieldExt, W: WrongExt>(
Ok(int_le)
}

struct ChipsRef<'a, F: FieldExt, const NUMBER_OF_LIMBS: usize, const BIT_LEN_LIMB: usize> {
main_gate: &'a MainGate<F>,
range_chip: &'a RangeChip<F>,
ecc_chip: &'a GeneralEccChip<Secp256k1Affine, F, NUMBER_OF_LIMBS, BIT_LEN_LIMB>,
scalar_chip: &'a IntegerChip<secp256k1::Fq, F, NUMBER_OF_LIMBS, BIT_LEN_LIMB>,
ecdsa_chip: &'a EcdsaChip<Secp256k1Affine, F, NUMBER_OF_LIMBS, BIT_LEN_LIMB>,
}

impl<F: FieldExt, const MAX_VERIF: usize> SignVerifyChip<F, MAX_VERIF> {
pub fn assign_aux(
fn assign_aux(
&self,
region: &mut Region<'_, F>,
ecc_chip: &mut GeneralEccChip<Secp256k1Affine, F, NUMBER_OF_LIMBS, BIT_LEN_LIMB>,
Expand All @@ -462,14 +470,15 @@ impl<F: FieldExt, const MAX_VERIF: usize> SignVerifyChip<F, MAX_VERIF> {
Ok(())
}

pub fn assign_ecdsa(
fn assign_ecdsa(
&self,
ctx: &mut RegionCtx<F>,
main_gate: &MainGate<F>,
range_chip: &RangeChip<F>,
ecc_chip: &GeneralEccChip<Secp256k1Affine, F, NUMBER_OF_LIMBS, BIT_LEN_LIMB>,
scalar_chip: &IntegerChip<secp256k1::Fq, F, NUMBER_OF_LIMBS, BIT_LEN_LIMB>,
ecdsa_chip: &EcdsaChip<Secp256k1Affine, F, NUMBER_OF_LIMBS, BIT_LEN_LIMB>,
chips: &ChipsRef<F, NUMBER_OF_LIMBS, BIT_LEN_LIMB>,
// main_gate: &MainGate<F>,
// range_chip: &RangeChip<F>,
// ecc_chip: &GeneralEccChip<Secp256k1Affine, F, NUMBER_OF_LIMBS, BIT_LEN_LIMB>,
// scalar_chip: &IntegerChip<secp256k1::Fq, F, NUMBER_OF_LIMBS, BIT_LEN_LIMB>,
// ecdsa_chip: &EcdsaChip<Secp256k1Affine, F, NUMBER_OF_LIMBS, BIT_LEN_LIMB>,
sign_data: &SignData,
) -> Result<AssignedECDSA<F>, Error> {
let SignData {
Expand All @@ -479,6 +488,14 @@ impl<F: FieldExt, const MAX_VERIF: usize> SignVerifyChip<F, MAX_VERIF> {
} = sign_data;
let (sig_r, sig_s) = signature;

let ChipsRef {
main_gate,
range_chip,
ecc_chip,
scalar_chip,
ecdsa_chip,
} = chips;

let integer_r = ecc_chip.new_unassigned_scalar(Some(*sig_r));
let integer_s = ecc_chip.new_unassigned_scalar(Some(*sig_s));
let msg_hash = ecc_chip.new_unassigned_scalar(Some(*msg_hash));
Expand All @@ -490,7 +507,7 @@ impl<F: FieldExt, const MAX_VERIF: usize> SignVerifyChip<F, MAX_VERIF> {
s: s_assigned,
};

let pk_in_circuit = ecc_chip.assign_point(ctx, Some((*pk).into()))?;
let pk_in_circuit = ecc_chip.assign_point(ctx, Some(*pk))?;
let pk_assigned = AssignedPublicKey {
point: pk_in_circuit,
};
Expand Down Expand Up @@ -518,17 +535,21 @@ impl<F: FieldExt, const MAX_VERIF: usize> SignVerifyChip<F, MAX_VERIF> {
})
}

pub fn assign_signature_verify(
#[allow(clippy::too_many_arguments)]
fn assign_signature_verify(
&self,
config: &SignVerifyConfig<F>,
region: &mut Region<'_, F>,
offset: usize,
address_is_zero_chip: &IsZeroChip<F>,
randomness: F,
padding: bool,
sign_data: &SignData,
address_is_zero_chip: &IsZeroChip<F>,
sign_data: Option<&SignData>,
assigned_ecdsa: &AssignedECDSA<F>,
) -> Result<(AssignedSignatureVerify<F>, KeccakAux), Error> {
let (padding, sign_data) = match sign_data {
Some(sign_data) => (false, sign_data.clone()),
None => (true, SignData::default()),
};
let SignData {
signature: _,
pk,
Expand Down Expand Up @@ -569,7 +590,7 @@ impl<F: FieldExt, const MAX_VERIF: usize> SignVerifyChip<F, MAX_VERIF> {
let msg_hash_rlc = Word::random_linear_combine(msg_hash_le, randomness);
let msg_hash_rlc = if !padding { msg_hash_rlc } else { F::zero() };
let msg_hash_rlc_assigned = region.assign_advice(
|| format!("msg_hash_rlc"),
|| "msg_hash_rlc",
config.msg_hash_rlc,
offset,
|| Ok(msg_hash_rlc),
Expand Down Expand Up @@ -605,9 +626,9 @@ impl<F: FieldExt, const MAX_VERIF: usize> SignVerifyChip<F, MAX_VERIF> {
)?;
}

let mut pk_x_be = pk_x_le.clone();
let mut pk_x_be = pk_x_le;
pk_x_be.reverse();
let mut pk_y_be = pk_y_le.clone();
let mut pk_y_be = pk_y_le;
pk_y_be.reverse();
let mut pk_bytes_be = [0u8; 64];
pk_bytes_be[..32].copy_from_slice(&pk_x_be);
Expand All @@ -630,12 +651,8 @@ impl<F: FieldExt, const MAX_VERIF: usize> SignVerifyChip<F, MAX_VERIF> {

let address = if !padding { address } else { F::zero() };
// Assign address and address_is_zero_chip
let address_assigned = region.assign_advice(
|| format!("address"),
config.address,
offset,
|| Ok(address),
)?;
let address_assigned =
region.assign_advice(|| "address", config.address, offset, || Ok(address))?;
address_is_zero_chip.assign(region, offset, Some(address))?;

// Assign msg_hash
Expand Down Expand Up @@ -690,6 +707,14 @@ impl<F: FieldExt, const MAX_VERIF: usize> SignVerifyChip<F, MAX_VERIF> {
let mut assigned_ecdsas = Vec::new();
let mut keccak_auxs = Vec::new();

let chips = ChipsRef {
main_gate: &main_gate,
range_chip: &range_chip,
ecc_chip: &ecc_chip,
scalar_chip: &scalar_chip,
ecdsa_chip: &ecdsa_chip,
};

layouter.assign_region(
|| "ecdsa chip verification",
|mut region| {
Expand All @@ -704,15 +729,7 @@ impl<F: FieldExt, const MAX_VERIF: usize> SignVerifyChip<F, MAX_VERIF> {
// padding (enabled when address == 0)
SignData::default()
};
let assigned_ecdsa = self.assign_ecdsa(
&mut ctx,
&main_gate,
&range_chip,
&ecc_chip,
&scalar_chip,
&ecdsa_chip,
&tx,
)?;
let assigned_ecdsa = self.assign_ecdsa(&mut ctx, &chips, &tx)?;
assigned_ecdsas.push(assigned_ecdsa);
}
Ok(())
Expand All @@ -724,26 +741,19 @@ impl<F: FieldExt, const MAX_VERIF: usize> SignVerifyChip<F, MAX_VERIF> {
|| "signature address verify",
|mut region| {
assigned_sig_verifs.clear();
let mut offset = 0;
for i in 0..MAX_VERIF {
let (padding, tx) = if i < txs.len() {
(false, txs[i].clone())
} else {
// padding (enabled when address == 0)
(true, SignData::default())
};
let assigned_ecdsa = &assigned_ecdsas[i];
// for i in 0..MAX_VERIF
for (i, assigned_ecdsa) in assigned_ecdsas.iter().enumerate() {
let sign_data = txs.get(i); // None when padding (enabled when address == 0)
let offset = i;
let (assigned_sig_verif, keccak_aux) = self.assign_signature_verify(
&config,
config,
&mut region,
offset,
&address_is_zero_chip,
randomness,
padding,
&tx,
&address_is_zero_chip,
sign_data,
assigned_ecdsa,
)?;
offset += 1;
if i < txs.len() {
keccak_auxs.push(keccak_aux);
}
Expand Down Expand Up @@ -778,10 +788,9 @@ fn sign(
Option::<secp256k1::Fq>::from(randomness.invert()).expect("cannot invert randomness");
let generator = Secp256k1Affine::generator();
let sig_point = generator * randomness;
let x = Option::<Coordinates<_>>::from(sig_point.to_affine().coordinates())
let x = *Option::<Coordinates<_>>::from(sig_point.to_affine().coordinates())
.expect("point is the identity")
.x()
.clone();
.x();

let x_repr = &mut Vec::with_capacity(32);
x.write(x_repr).expect("cannot write bytes to array");
Expand Down

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