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[TB]: Extend testbench to improve debugging (#53)
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Lore0599 authored Nov 6, 2024
1 parent 314e947 commit 233863c
Showing 1 changed file with 2 additions and 1 deletion.
3 changes: 2 additions & 1 deletion target/sim/src/vip_chimera_soc.sv
Original file line number Diff line number Diff line change
Expand Up @@ -329,7 +329,7 @@ module vip_chimera_soc

// Wait for termination signal and get return code
task automatic jtag_wait_for_eoc(output word_bt exit_code);
jtag_poll_bit0(AmRegs + cheshire_reg_pkg::CHESHIRE_SCRATCH_2_OFFSET, exit_code, 800);
jtag_poll_bit0(AmRegs + cheshire_reg_pkg::CHESHIRE_SCRATCH_2_OFFSET, exit_code, 4000);
exit_code >>= 1;
if (exit_code) $error("[JTAG] FAILED: return code %0d", exit_code);
else $display("[JTAG] SUCCESS");
Expand Down Expand Up @@ -426,6 +426,7 @@ module vip_chimera_soc
uart_boot_eoc = 1;
end else begin
uart_read_buf.push_back(bite);
$display("Read Byte: %s", bite);
end
end
end
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