Data Generation (#103) #2042

Job	Run time
tc-gcc	30s
check-control-registers	24s
check-opcodes	4s
riscv-isa-sim	19s
tc-llvm	55s
verilator	5s
verilator-model (minpool)	14s
verilator-model (mempool)	26s
check-bootrom	10s
build-apps-gcc (minpool)	1m 33s
build-apps-gcc (mempool)	1m 22s
unit-test	2m 7s
build-apps-llvm (minpool)	1m 11s
tc-halide	11s
build-apps-llvm (mempool)	1m 47s
build-apps-halide (minpool)	50s
build-apps-halide (mempool)	1m 12s
run-apps-gcc (minpool)	33s
run-apps-gcc (mempool)	2m 28s
run-apps-halide (minpool)	40s
run-apps-halide (mempool)	3m 8s
run-apps-llvm (minpool)	33s
run-apps-llvm (mempool)	2m 26s
clean-up-compile-runs (minpool)	4s
clean-up	5s
clean-up-compile-runs (mempool)	3s
	23m 20s

Provide feedback