Skip to content

Commit

Permalink
[AXI-NoC] Swap connection between interleaver and splitter.
Browse files Browse the repository at this point in the history
  • Loading branch information
@yichao-zh
yichao-zh committed Dec 4, 2024
1 parent c3b9d61 commit 0dd3abf
Show file tree
Hide file tree
Showing 2 changed files with 38 additions and 43 deletions.
13 changes: 4 additions & 9 deletions hardware/scripts/questa/wave.tcl
View file
Original file line number Diff line number Diff line change
Expand Up @@ -57,15 +57,7 @@ for {set group 0} {$group < [examine -radix dec /mempool_pkg::NumGroups]} {incr
for {set tile 0} {$tile < [examine -radix dec /mempool_pkg::NumTilesPerGroup]} {incr tile} {
do ../scripts/questa/wave_tile.tcl $group $tile $NumY
}
# Interconnects
for {set tgtgroup 0} {$tgtgroup < [examine -radix dec /mempool_pkg::NumGroups]} {incr tgtgroup} {
if {$tgtgroup != $group} {
set interco_idx [expr $group ^ $tgtgroup]
# add wave -group group_[$group] -group interconnect_to_group[$tgtgroup] /mempool_tb/dut/i_mempool_cluster/gen_groups_x\[[expr ${group}/${NumX}]\]/gen_groups_y\[[expr ${group}%${NumY}]\]/i_group/i_mempool_group/gen_remote_interco[$interco_idx]/i_remote_interco/*
}
add wave -group group_[$group] -group axi_interleaver /mempool_tb/dut/i_mempool_cluster/gen_groups_x\[[expr ${group}/${NumX}]\]/gen_groups_y\[[expr ${group}%${NumY}]\]/i_group/i_axi_L2_interleaver/*
add wave -group group_[$group] -group axi_spliter /mempool_tb/dut/i_mempool_cluster/gen_groups_x\[[expr ${group}/${NumX}]\]/gen_groups_y\[[expr ${group}%${NumY}]\]/i_group/gen_axi_splitter/i_axi_burst_splitter/*
}
# Local TCDM
add wave -group group_[$group] -group interconnect_local /mempool_tb/dut/i_mempool_cluster/gen_groups_x\[[expr ${group}/${NumX}]\]/gen_groups_y\[[expr ${group}%${NumY}]\]/i_group/i_mempool_group/tcdm_master_req*
add wave -group group_[$group] -group interconnect_local /mempool_tb/dut/i_mempool_cluster/gen_groups_x\[[expr ${group}/${NumX}]\]/gen_groups_y\[[expr ${group}%${NumY}]\]/i_group/i_mempool_group/tcdm_master_resp*
add wave -group group_[$group] -group interconnect_local /mempool_tb/dut/i_mempool_cluster/gen_groups_x\[[expr ${group}/${NumX}]\]/gen_groups_y\[[expr ${group}%${NumY}]\]/i_group/i_mempool_group/tcdm_slave_req*
Expand All @@ -77,6 +69,9 @@ for {set group 0} {$group < [examine -radix dec /mempool_pkg::NumGroups]} {incr
add wave -group group_[$group] -group floo_tcdm_router_resp /mempool_tb/dut/i_mempool_cluster/gen_groups_x\[[expr ${group}/${NumX}]\]/gen_groups_y\[[expr ${group}%${NumY}]\]/i_group/gen_router_router_i[$tile]/gen_router_router_j[$port]/i_floo_tcdm_resp_router/*
}
}
# Splitter & Interleaver
add wave -group group_[$group] -group axi_splitter /mempool_tb/dut/i_mempool_cluster/gen_groups_x\[[expr ${group}/${NumX}]\]/gen_groups_y\[[expr ${group}%${NumY}]\]/i_group/gen_axi_splitter/i_axi_burst_splitter/*
add wave -group group_[$group] -group axi_interleaver /mempool_tb/dut/i_mempool_cluster/gen_groups_x\[[expr ${group}/${NumX}]\]/gen_groups_y\[[expr ${group}%${NumY}]\]/i_group/i_axi_L2_interleaver/*
# AXI Router
add wave -group group_[$group] -group floo_axi_chimney /mempool_tb/dut/i_mempool_cluster/gen_groups_x\[[expr ${group}/${NumX}]\]/gen_groups_y\[[expr ${group}%${NumY}]\]/i_group/i_floo_narrow_wide_chimney/*
add wave -group group_[$group] -group floo_axi_router /mempool_tb/dut/i_mempool_cluster/gen_groups_x\[[expr ${group}/${NumX}]\]/gen_groups_y\[[expr ${group}%${NumY}]\]/i_group/i_floo_narrow_wide_router/*
Expand Down
68 changes: 34 additions & 34 deletions hardware/src/mempool_group_floonoc_wrapper.sv
View file
Original file line number Diff line number Diff line change
Expand Up @@ -84,10 +84,10 @@ logic [NumTilesPerGroup-1:0][NumRemotePortsPerTile-1:1] tcdm_slave_

axi_tile_req_t axi_mst_req;
axi_tile_resp_t axi_mst_resp;
axi_tile_req_t axi_mst_req_before_interleaver;
axi_tile_resp_t axi_mst_resp_before_interleaver;
axi_tile_req_t axi_mst_req_before_spilitter;
axi_tile_resp_t axi_mst_resp_before_spiltter;
axi_tile_req_t axi_mst_req_from_group;
axi_tile_resp_t axi_mst_resp_to_group;
axi_tile_req_t axi_mst_req_splitter;
axi_tile_resp_t axi_mst_resp_splitter;

// Instantiate the mempool_group
mempool_group #(
Expand Down Expand Up @@ -119,48 +119,48 @@ mempool_group #(
.dma_req_valid_i (dma_req_valid_i ),
.dma_req_ready_o (dma_req_ready_o ),
.dma_meta_o (dma_meta_o ),
.axi_mst_req_o (axi_mst_req_before_interleaver ),
.axi_mst_resp_i (axi_mst_resp_before_interleaver)
);

axi_L2_interleaver #(
.NumAXIMasters (1 ),
.NumL2 (NumL2Banks )
) i_axi_L2_interleaver (
.clk_i (clk_i ),
.rst_ni (rst_ni ),
.axi_l2_req_i (axi_mst_req_before_interleaver ),
.axi_l2_resp_o (axi_mst_resp_before_interleaver),
.axi_l2_req_interleaved_o (axi_mst_req_before_spilitter ),
.axi_l2_resp_interleaved_i(axi_mst_resp_before_spiltter )
.axi_mst_req_o (axi_mst_req_from_group ),
.axi_mst_resp_i (axi_mst_resp_to_group )
);

// Splitting logic based on DmaBurstLen and Interleave
generate
if (DmaBurstLen > Interleave) begin : gen_axi_splitter
axi_burst_splitter #(
.MaxReadTxns (16 ),
.MaxWriteTxns (16 ),
.AddrWidth (AddrWidth ),
.DataWidth (AxiDataWidth ),
.IdWidth (AxiTileIdWidth ),
.UserWidth (1 ),
.axi_req_t (axi_tile_req_t ),
.axi_resp_t (axi_tile_resp_t )
.MaxReadTxns (16 ),
.MaxWriteTxns (16 ),
.AddrWidth (AddrWidth ),
.DataWidth (AxiDataWidth ),
.IdWidth (AxiTileIdWidth ),
.UserWidth (1 ),
.axi_req_t (axi_tile_req_t ),
.axi_resp_t (axi_tile_resp_t )
) i_axi_burst_splitter (
.clk_i (clk_i ),
.rst_ni (rst_ni ),
.slv_req_i (axi_mst_req_before_spilitter ),
.slv_resp_o (axi_mst_resp_before_spiltter ),
.mst_req_o (axi_mst_req ),
.mst_resp_i (axi_mst_resp )
.clk_i (clk_i ),
.rst_ni (rst_ni ),
.slv_req_i (axi_mst_req_from_group ),
.slv_resp_o (axi_mst_resp_to_group ),
.mst_req_o (axi_mst_req_splitter ),
.mst_resp_i (axi_mst_resp_splitter )
);
end else begin : gen_axi_splitter_bypass
assign axi_mst_req = axi_mst_req_before_spilitter;
assign axi_mst_resp = axi_mst_resp_before_spiltter;
assign axi_mst_req_splitter = axi_mst_req_from_group;
assign axi_mst_resp_to_group = axi_mst_resp_splitter;
end
endgenerate

axi_L2_interleaver #(
.NumAXIMasters (1 ),
.NumL2 (NumL2Banks )
) i_axi_L2_interleaver (
.clk_i (clk_i ),
.rst_ni (rst_ni ),
.axi_l2_req_i (axi_mst_req_splitter ),
.axi_l2_resp_o (axi_mst_resp_splitter ),
.axi_l2_req_interleaved_o (axi_mst_req ),
.axi_l2_resp_interleaved_i(axi_mst_resp )
);

// Instantiate the floo_tcdm_router for each tile
floo_tcdm_req_t [NumTilesPerGroup-1:0][NumRemotePortsPerTile-1:1] floo_req_to_router, floo_req_from_router;
floo_tcdm_resp_t [NumTilesPerGroup-1:0][NumRemotePortsPerTile-1:1] floo_resp_to_router, floo_resp_from_router;
Expand Down

0 comments on commit 0dd3abf

Please sign in to comment.