WIP:[MemPool-Spatz]

1. Update Spatz version. 2. Remove RVD target in runtime.mk 3. Bug fixes in snitch 4. WIP: Add and fix some vector floating tests.
pulp-platform · Dec 7, 2023 · ac39c11 · ac39c11
1 parent e447292
commit ac39c11
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Showing 19 changed files with 1,408 additions and 98 deletions.
diff --git a/Bender.lock b/Bender.lock
@@ -85,7 +85,7 @@ packages:
     dependencies:
       - common_cells
   spatz:
-    revision: c8e444c6b64e2b905f4767d158fa3a8c718fef39
+    revision: fa75ec560c4518bdac4c350481e6474188f88ecc
     version: null
     source:
       Git: git@iis-git.ee.ethz.ch:spatz/spatz.git
@@ -96,7 +96,6 @@ packages:
     - fpnew
     - idma
     - register_interface
-    - reqrsp_interface
     - riscv-dbg
     - tech_cells_generic
   tech_cells_generic:

diff --git a/Bender.yml b/Bender.yml
@@ -14,7 +14,7 @@ dependencies:
   reqrsp_interface:     { path: "hardware/deps/reqrsp_interface"                                                }
   snitch:               { path: "hardware/deps/snitch"                                                          }
   tech_cells_generic:   { git: "https://github.com/pulp-platform/tech_cells_generic.git",   version: 0.2.5      }
-  spatz:                { git: "git@iis-git.ee.ethz.ch:spatz/spatz.git",                    rev:   c8e444c      }
+  spatz:                { git: "git@iis-git.ee.ethz.ch:spatz/spatz.git",                    rev:   fa75ec56      }
   FPnew:                { git: "https://github.com/pulp-platform/cvfpu.git",                rev:     pulp-v0.1.3    }
 
 workspace:

diff --git a/hardware/Makefile b/hardware/Makefile
@@ -103,6 +103,7 @@ vlog_defs += -DSEQ_MEM_SIZE=$(seq_mem_size) -DXQUEUE_SIZE=$(xqueue_size)
 
 ifeq ($(spatz), 1)
 	vlog_defs   += -DVLEN=$(vlen) -DN_IPU=$(n_ipu) -DN_FPU=$(n_fpu) -DN_FU=$(shell awk 'BEGIN{print ($(n_ipu) > $(n_fpu)) ? $(n_ipu) : $(n_fpu)}')
+	vlog_defs   += -DMEMPOOL_SPATZ=$(spatz)
 	bender_defs += -t spatz
 endif
 
@@ -148,7 +149,7 @@ $(buildpath)/$(library):
 .PHONY: compile
 compile: dpi lib $(buildpath) $(buildpath)/compile.tcl update_opcodes
 $(buildpath)/compile.tcl: $(bender) $(config_mk) Makefile $(MEMPOOL_DIR)/Bender.yml $(shell find {src,tb,deps} -type f)
-	$(bender) script vsim --vlog-arg="$(vlog_args)" $(vlog_defs) -t rtl -t mempool_vsim $(bender_defs) > $(buildpath)/compile.tcl
+	$(bender) script vsim --vlog-arg="$(vlog_args)" $(vlog_defs) -t rtl -t mempool -t mempool_vsim $(bender_defs) > $(buildpath)/compile.tcl
 	echo "exit" >> $(buildpath)/compile.tcl
 	cd $(buildpath) && $(questa_cmd) vsim -work $(library) -c -do compile.tcl
 
@@ -185,7 +186,7 @@ $(buildpath)/$(dpi_library)/mempool_dpi.so: $(dpi)
 .PHONY: elabvcs
 elabvcs: dpivcs $(buildpath) $(buildpath)/compilevcs.sh update_opcodes
 $(buildpath)/compilevcs.sh: $(bender) $(config_mk) Makefile $(MEMPOOL_DIR)/Bender.yml $(shell find {src,tb,deps} -type f)
-	$(bender) script vcs --vlogan-bin="$(vcs_cmd) vlogan" --vlog-arg="$(vlogan_args)" $(vlog_defs) -t rtl -t mempool_vsim $(bender_defs) > $(buildpath)/compilevcs.sh
+	$(bender) script vcs --vlogan-bin="$(vcs_cmd) vlogan" --vlog-arg="$(vlogan_args)" $(vlog_defs) -t rtl -t mempool -t mempool_vsim $(bender_defs) > $(buildpath)/compilevcs.sh
 	echo "exit" >> $(buildpath)/compilevcs.sh
 	# Call VCS
 	cd $(buildpath) && \
@@ -259,7 +260,7 @@ $(VERILATOR_MK): $(VERILATOR_CONF) $(VERILATOR_WAIVE) $(MEMPOOL_DIR)/Bender.yml
 	# Overwrite Bootaddress to L2 base while we don't have a DPI to write a wake-up
 	$(eval boot_addr=$(l2_base))
 	# Create Bender script of all RTL files
-	$(bender) script verilator $(vlog_defs) -t rtl -t mempool_verilator $(bender_defs) > $(verilator_files)
+	$(bender) script verilator $(vlog_defs) -t rtl -t mempool -t mempool_verilator $(bender_defs) > $(verilator_files)
 	# Append the verilator library files
 	@echo '' >> $(verilator_files)
 	# Append the verilator library files: Includes
@@ -291,7 +292,7 @@ lint: spyglass/tmp/files spyglass/sdc/func.sdc spyglass/scripts/run_lint.tcl
 
 spyglass/tmp/files: $(bender)
 	mkdir -p spyglass/tmp
-	$(bender) script verilator $(vlog_defs) -t rtl -t mempool_verilator $(bender_defs) > spyglass/tmp/files
+	$(bender) script verilator $(vlog_defs) -t rtl -t mempool -t mempool_verilator $(bender_defs) > spyglass/tmp/files
 
 ################
 # Tracing      #

diff --git a/hardware/deps/snitch/src/snitch_lsu.sv b/hardware/deps/snitch/src/snitch_lsu.sv
@@ -11,6 +11,8 @@ module snitch_lsu
   import cf_math_pkg::idx_width;
 #(
   parameter type tag_t                       = logic [4:0],
+  parameter type dreq_t                      = logic,
+  parameter type drsp_t                      = logic,
   parameter int unsigned NumOutstandingLoads = 1,
   parameter bit NaNBox                       = 0,
   // Dependent parameters. DO NOT CHANGE.
@@ -20,8 +22,8 @@ module snitch_lsu
   input  logic               rst_i,
   // request channel
   input  tag_t               lsu_qtag_i,
-  input  logic               lsu_qwrite,
-  input  logic               lsu_qsigned,
+  input  logic               lsu_qwrite_i,
+  input  logic               lsu_qsigned_i,
   input  logic [31:0]        lsu_qaddr_i,
   input  logic [31:0]        lsu_qdata_i,
   input  logic [1:0]         lsu_qsize_i,
@@ -104,9 +106,9 @@ module snitch_lsu
   end
 
   assign req_metadata = '{
-    write:    lsu_qwrite,
+    write:    lsu_qwrite_i,
     tag:      lsu_qtag_i,
-    sign_ext: lsu_qsigned,
+    sign_ext: lsu_qsigned_i,
     offset:   lsu_qaddr_i[1:0],
     size:     lsu_qsize_i
   };
@@ -135,7 +137,7 @@ module snitch_lsu
   // also check that we can actually store the necessary information to process
   // it in the upcoming cycle(s).
   assign data_qvalid_o = lsu_qvalid_i && !id_table_full;
-  assign data_qwrite_o = lsu_qwrite;
+  assign data_qwrite_o = lsu_qwrite_i;
   assign data_qaddr_o  = {lsu_qaddr_i[31:2], 2'b0};
   assign data_qamo_o   = lsu_qamo_i;
   assign data_qid_o    = req_id;

diff --git a/hardware/deps/snitch/src/snitch_md.sv b/hardware/deps/snitch/src/snitch_md.sv
@@ -274,8 +274,16 @@ module snitch_md
   assign acc_qid_o = rd;
   assign acc_qdata_op_o = inst_data_i;
   assign acc_qdata_arga_o = {{32{gpr_rdata[0][31]}}, gpr_rdata[0]};
-  assign acc_qdata_argb_o = {{32{gpr_rdata[1][31]}}, gpr_rdata[1]};
-  assign acc_qdata_argc_o = {{32{gpr_rdata[2][31]}}, gpr_rdata[2]};
+  // assign acc_qdata_argb_o = {{32{gpr_rdata[1][31]}}, gpr_rdata[1]};
+  assign acc_qdata_argb_o = opb_select inside {IImmediate, SImmediate} ? 
+    {{32{alu_result[31]}}, alu_result} : {{32{gpr_rdata[1][31]}}, gpr_rdata[1]};
+
+`ifdef XPULPIMG_EXTENSION
+  assign acc_qdata_argc_o = gpr_rdata[2]};
+`else
+  assign acc_qdata_argc_o = '0;
+`endif
+
 
   // instruction fetch interface
   assign inst_addr_o = pc_q;
@@ -2239,7 +2247,7 @@ module snitch_md
           opa_select = Reg;
           opb_select = IImmediate;
           write_rd = 1'b0;
-          acc_qvalid_o = valid_instr;
+          acc_qvalid_o = valid_instr && !acc_mem_stall;
           ls_size = Word;
           is_fp_load = 1'b1;
         end else begin
@@ -2251,7 +2259,7 @@ module snitch_md
           opa_select = Reg;
           opb_select = SFImmediate;
           write_rd = 1'b0;
-          acc_qvalid_o = valid_instr;
+          acc_qvalid_o = valid_instr && !acc_mem_stall;
           ls_size = Word;
           is_fp_store = 1'b1;
           acc_mem_store   = 1'b1;
@@ -2265,7 +2273,7 @@ module snitch_md
           opa_select = Reg;
           opb_select = IImmediate;
           write_rd = 1'b0;
-          acc_qvalid_o = valid_instr;
+          acc_qvalid_o = valid_instr && !acc_mem_stall;
           ls_size = Double;
           is_fp_load = 1'b1;
         end else begin
@@ -2277,7 +2285,7 @@ module snitch_md
           opa_select = Reg;
           opb_select = SFImmediate;
           write_rd = 1'b0;
-          acc_qvalid_o = valid_instr;
+          acc_qvalid_o = valid_instr && !acc_mem_stall;
           ls_size = Double;
           is_fp_store = 1'b1;
           acc_mem_store   = 1'b1;
@@ -2291,7 +2299,7 @@ module snitch_md
           opa_select = Reg;
           opb_select = IImmediate;
           write_rd = 1'b0;
-          acc_qvalid_o = valid_instr;
+          acc_qvalid_o = valid_instr && !acc_mem_stall;
           ls_size = HalfWord;
           is_fp_load = 1'b1;
         end else begin
@@ -2303,7 +2311,7 @@ module snitch_md
           opa_select = Reg;
           opb_select = SFImmediate;
           write_rd = 1'b0;
-          acc_qvalid_o = valid_instr;
+          acc_qvalid_o = valid_instr && !acc_mem_stall;
           ls_size = HalfWord;
           is_fp_store = 1'b1;
           acc_mem_store   = 1'b1;
@@ -2317,7 +2325,7 @@ module snitch_md
           opa_select = Reg;
           opb_select = IImmediate;
           write_rd = 1'b0;
-          acc_qvalid_o = valid_instr;
+          acc_qvalid_o = valid_instr && !acc_mem_stall;
           ls_size = Byte;
           is_fp_load = 1'b1;
         end else begin
@@ -2329,7 +2337,7 @@ module snitch_md
           opa_select = Reg;
           opb_select = SFImmediate;
           write_rd = 1'b0;
-          acc_qvalid_o = valid_instr;
+          acc_qvalid_o = valid_instr && !acc_mem_stall;
           ls_size = Byte;
           is_fp_store = 1'b1;
           acc_mem_store   = 1'b1;
@@ -2525,7 +2533,9 @@ module snitch_md
       PC: opb = pc_q;
       CSR: opb = csr_rvalue;
       PBImmediate: opb = pbimm;
-      RegRd: opb = gpr_rdata[2];
+`ifdef XPULPIMG_EXTENSION
+      RegRd: opb = (RegNrReadPorts < 3) ? '0 : gpr_rdata[2];
+`endif
       default: opb = '0;
     endcase
   end
@@ -2633,8 +2643,8 @@ module snitch_md
     .clk_i                                ,
     .rst_i                                ,
     .lsu_qtag_i   ( rd                    ),
-    .lsu_qwrite   ( is_store              ),
-    .lsu_qsigned  ( is_signed             ),
+    .lsu_qwrite_i ( is_store              ),
+    .lsu_qsigned_i( is_signed             ),
     .lsu_qaddr_i  ( lsu_qaddr             ),
     .lsu_qdata_i  ( gpr_rdata[1]          ),
     .lsu_qsize_i  ( ls_size               ),

diff --git a/hardware/deps/snitch/src/snitch_pkg.sv b/hardware/deps/snitch/src/snitch_pkg.sv
@@ -48,17 +48,18 @@ package snitch_pkg;
 
   typedef struct packed {
     addr_t addr;
-    logic [4:0] id;
+    logic [5:0] id;
     logic [31:0] data_op;
     data_t data_arga;
     data_t data_argb;
     data_t data_argc;
   } acc_req_t;
 
   typedef struct packed {
-    logic [4:0] id;
+    logic [5:0] id;
     logic error;
     data_t data;
+    logic  write;
   } acc_resp_t;
 
   // Number of instructions the sequencer can hold