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WIP:[MemPool-Spatz]
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1. Clean the tests and benchmarks for MemPool-Spatz.
2. Add TeraPool-Spatz4 configuration.
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msc23h24 Diyou Shen (dishen) committed Dec 14, 2023
1 parent 46ca235 commit e24f8df
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62 changes: 62 additions & 0 deletions config/terapool_spatz4_fpu.mk
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# Copyright 2021 ETH Zurich and University of Bologna.
# Licensed under the Apache License, Version 2.0, see LICENSE for details.
# SPDX-License-Identifier: Apache-2.0

# Author: Matheus Cavalcante, ETH Zurich

################
## TeraPool ##
################

# Global Control
terapool ?= 1

# Number of cores
num_cores ?= 256

# Number of groups
num_groups ?= 4

# Number of cores per Terapool tile
num_cores_per_tile ?= 2

# Number of sub groups per Terapool group
num_sub_groups_per_group ?= 4

# L1 scratchpad banking factor
banking_factor ?= 4

# Access latency between remote groups
# Options: "7", "9" or "11":
remote_group_latency_cycles ?= 7

# Radix for hierarchical AXI interconnect
axi_hier_radix ?= 9

# Number of AXI masters per group
axi_masters_per_group ?= 4

# Number of DMA backends in each group
dmas_per_group ?= 4

# L2 Banks/Channels
l2_banks = 16

# Makefile RTL Filtering Control
subgroup_rtl = 1

# Activate Spatz and RVV
spatz ?= 1

# Lenght of single vector register
vlen ?= 512

# Number of IPUs
n_ipu ?= 4

n_fpu ?= 4

# Deactivate the XpulpIMG extension
xpulpimg ?= 0

rvf ?= 1
3 changes: 3 additions & 0 deletions hardware/Makefile
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Expand Up @@ -102,6 +102,9 @@ vlog_defs += -DDMAS_PER_GROUP=$(dmas_per_group)
vlog_defs += -DAXI_HIER_RADIX=$(axi_hier_radix) -DAXI_MASTERS_PER_GROUP=$(axi_masters_per_group)
vlog_defs += -DSEQ_MEM_SIZE=$(seq_mem_size) -DXQUEUE_SIZE=$(xqueue_size)
# This parameter is only used for TeraPool configurations
ifdef terapool
vlog_defs += -DTERAPOOL=$(terapool)
endif
vlog_defs += -DNUM_SUB_GROUPS_PER_GROUP=$(num_sub_groups_per_group) -DREMOTE_GROUP_LATENCY_CYCLES=$(remote_group_latency_cycles)

ifeq ($(spatz), 1)
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14 changes: 7 additions & 7 deletions hardware/scripts/questa/wave.tcl
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Expand Up @@ -30,15 +30,15 @@ add wave /mempool_tb/wfi

# Add all cores from group 0 tile 0
for {set core 0} {$core < [examine -radix dec mempool_pkg::NumCoresPerTile]} {incr core} {
if {$config == {terapool}} {
if {$config == {terapool_spatz4_fpu} | $config == {terapool}} {
do ../scripts/questa/wave_core.tcl 0 0 0 $core
} else {
do ../scripts/questa/wave_core.tcl 0 0 $core
}
}

# Add specific cores from different tiles
if {$config == {terapool}} {
if {$config == {terapool_spatz4_fpu} | $config == {terapool}} {
do ../scripts/questa/wave_core.tcl 1 0 0 0
} else {
do ../scripts/questa/wave_core.tcl 1 0 0
Expand All @@ -47,7 +47,7 @@ if {$config == {terapool}} {
# Add groups
for {set group 0} {$group < [examine -radix dec /mempool_pkg::NumGroups]} {incr group} {
# Add tiles
if {$config == {terapool}} {
if {$config == {terapool_spatz4_fpu} | $config == {terapool}} {
for {set subgroup 0} {$subgroup < [expr min(4,[examine -radix dec /mempool_pkg::NumSubGroupsPerGroup])]} {incr subgroup} {
for {set tile 0} {$tile < [expr min(4,[examine -radix dec /mempool_pkg::NumTilesPerSubGroup])]} {incr tile} {
do ../scripts/questa/wave_tile.tcl $group $subgroup $tile
Expand All @@ -63,14 +63,14 @@ for {set group 0} {$group < [examine -radix dec /mempool_pkg::NumGroups]} {incr
for {set tgtgroup 0} {$tgtgroup < [examine -radix dec /mempool_pkg::NumGroups]} {incr tgtgroup} {
if {$tgtgroup != $group} {
set interco_idx [expr $group ^ $tgtgroup]
if {$config == {terapool}} {
if {$config == {terapool_spatz4_fpu} | $config == {terapool}} {
add wave -group group_[$group] -group interconnect_to_group[$tgtgroup] /mempool_tb/dut/i_mempool_cluster/gen_groups[$group]/gen_rtl_group/i_group/gen_remote_interco[$interco_idx]/i_remote_interco/*
} else {
add wave -group group_[$group] -group interconnect_to_group[$tgtgroup] /mempool_tb/dut/i_mempool_cluster/gen_groups[$group]/i_group/gen_remote_interco[$interco_idx]/i_remote_interco/*
}
}
}
if {$config != {terapool}} {
if {$config != {terapool} & $config != {terapool_spatz4_fpu}} {
add wave -group group_[$group] -group interconnect_local /mempool_tb/dut/i_mempool_cluster/gen_groups[$group]/i_group/i_local_interco/*
}
}
Expand All @@ -83,7 +83,7 @@ add wave -Group Control_Registers /mempool_tb/dut/i_ctrl_registers/*
add wave -Group DMA /mempool_tb/dut/i_mempool_dma/*
add wave -Group DMA -Group Reg /mempool_tb/dut/i_mempool_dma/i_mempool_dma_frontend_reg_top/*
for {set group 0} {$group < [examine -radix dec /mempool_pkg::NumGroups]} {incr group} {
if {$config == {terapool}} {
if {$config == {terapool_spatz4_fpu} | $config == {terapool}} {
add wave -Group DMA_midend_${group} /mempool_tb/dut/i_mempool_cluster/gen_groups[$group]/gen_rtl_group/i_group/i_idma_distributed_midend/NoMstPorts
add wave -Group DMA_midend_${group} /mempool_tb/dut/i_mempool_cluster/gen_groups[$group]/gen_rtl_group/i_group/i_idma_distributed_midend/DmaRegionWidth
add wave -Group DMA_midend_${group} /mempool_tb/dut/i_mempool_cluster/gen_groups[$group]/gen_rtl_group/i_group/i_idma_distributed_midend/DmaRegionStart
Expand Down Expand Up @@ -121,7 +121,7 @@ add wave -Group DMA_midend_cluster /mempool_tb/dut/i_mempool_cluster/i_idma_dist

add wave -Group DMA_split /mempool_tb/dut/i_mempool_cluster/i_idma_split_midend/*

if {$config == {terapool}} {
if {$config == {terapool_spatz4_fpu} | $config == {terapool}} {
do ../scripts/questa/wave_cache.tcl 0 0 0 0
} else {
do ../scripts/questa/wave_cache.tcl 0 0 0
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2 changes: 1 addition & 1 deletion hardware/scripts/questa/wave_cache.tcl
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Expand Up @@ -4,7 +4,7 @@

# Create cache for core $3 from group $1 tile $2 (core_id=NUM_CORES_PER_group*$1+NUM_CORES_PER_TILE*$2+$3)

if {$config == {terapool}} {
if {$config == {terapool_spatz4_fpu} | $config == {terapool}} {
add wave -noupdate -group cache[$1][$2][$3][$4] -divider Parameters
add wave -noupdate -group cache[$1][$2][$3][$4] /mempool_tb/dut/i_mempool_cluster/gen_groups[$1]/gen_rtl_group/i_group/gen_sub_groups[$2]/gen_rtl_sg/i_sub_group/gen_tiles[$3]/i_tile/gen_caches[$4]/i_snitch_icache/NR_FETCH_PORTS
add wave -noupdate -group cache[$1][$2][$3][$4] /mempool_tb/dut/i_mempool_cluster/gen_groups[$1]/gen_rtl_group/i_group/gen_sub_groups[$2]/gen_rtl_sg/i_sub_group/gen_tiles[$3]/i_tile/gen_caches[$4]/i_snitch_icache/L0_LINE_COUNT
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2 changes: 1 addition & 1 deletion hardware/scripts/questa/wave_core.tcl
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Expand Up @@ -3,7 +3,7 @@
# SPDX-License-Identifier: SHL-0.51

# Create group for core $3 from group $1 tile $2 (core_id=NUM_CORES_PER_group*$1+NUM_CORES_PER_TILE*$2+$3)
if {$config == {terapool}} {
if {$config == {terapool_spatz4_fpu} | $config == {terapool}} {
add wave -noupdate -group core[$1][$2][$3][$4] -group Params /mempool_tb/dut/i_mempool_cluster/gen_groups[$1]/gen_rtl_group/i_group/gen_sub_groups[$2]/gen_rtl_sg/i_sub_group/gen_tiles[$3]/i_tile/gen_cores[$4]/gen_mempool_cc/riscv_core/BootAddr
add wave -noupdate -group core[$1][$2][$3][$4] -group Params /mempool_tb/dut/i_mempool_cluster/gen_groups[$1]/gen_rtl_group/i_group/gen_sub_groups[$2]/gen_rtl_sg/i_sub_group/gen_tiles[$3]/i_tile/gen_cores[$4]/gen_mempool_cc/riscv_core/MTVEC
add wave -noupdate -group core[$1][$2][$3][$4] -group Params /mempool_tb/dut/i_mempool_cluster/gen_groups[$1]/gen_rtl_group/i_group/gen_sub_groups[$2]/gen_rtl_sg/i_sub_group/gen_tiles[$3]/i_tile/gen_cores[$4]/gen_mempool_cc/riscv_core/RVE
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2 changes: 1 addition & 1 deletion hardware/scripts/questa/wave_tile.tcl
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Expand Up @@ -3,7 +3,7 @@
# SPDX-License-Identifier: SHL-0.51

# Create group for group $1 tile $2
if {$config == {terapool}} {
if {$config == {terapool_spatz4_fpu} | $config == {terapool}} {
add wave -noupdate -group group_[$1] -group sub_group_[$2] -group Tile_[$3] -group Params /mempool_pkg::NumBanksPerTile
add wave -noupdate -group group_[$1] -group sub_group_[$2] -group Tile_[$3] -group Params /mempool_pkg::NumTiles
add wave -noupdate -group group_[$1] -group sub_group_[$2] -group Tile_[$3] -group Params /mempool_pkg::NumBanks
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44 changes: 22 additions & 22 deletions hardware/src/mempool_group.sv
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Expand Up @@ -111,18 +111,18 @@ module mempool_group
end: gen_tcdm_struct

`ifdef TERAPOOL
/*********************
* TeraPool Section *
*********************/
// ----------------------------------------------------- //
// SubGroups Instantiation.
// PostLayout Simulation:
// - Only SubGroup_0 Replaced by Netlist for simulation.
// TCDM interconnections:
// - Local SubGroups;
// - Remote Groups.
// Most of AXI/DMA logics put into SubGroup level.
// ----------------------------------------------------- //
/*********************
* TeraPool Section *
*********************/
// ----------------------------------------------------- //
// SubGroups Instantiation.
// PostLayout Simulation:
// - Only SubGroup_0 Replaced by Netlist for simulation.
// TCDM interconnections:
// - Local SubGroups;
// - Remote Groups.
// Most of AXI/DMA logics put into SubGroup level.
// ----------------------------------------------------- //

/****************
* Sub_Groups *
Expand Down Expand Up @@ -579,16 +579,16 @@ module mempool_group
);

`else
/******************************
* MemPool / MinPool Section *
******************************/
// ----------------------------------------------------- //
// Tile Instantiation.
// TCDM interconnections:
// - Local Tiles;
// - Remote Groups;
// Most of AXI/DMA logics put on Group level.
// ----------------------------------------------------- //
/******************************
* MemPool / MinPool Section *
******************************/
// ----------------------------------------------------- //
// Tile Instantiation.
// TCDM interconnections:
// - Local Tiles;
// - Remote Groups;
// Most of AXI/DMA logics put on Group level.
// ----------------------------------------------------- //

/***********
* Tiles *
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Expand Up @@ -29,8 +29,8 @@
#endif

// dump(result, 1);
const unsigned int csize = 256;
const unsigned int core_count = 16;
const unsigned int csize = 64;
const unsigned int core_count = 64;
const unsigned int esize = csize*core_count;

float x[esize];
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1 change: 1 addition & 0 deletions software/apps/spatz_apps/sp-fmatmul/data/.gitignore
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data_gemm.h
35 changes: 35 additions & 0 deletions software/apps/spatz_apps/sp-fmatmul/data/data_64_128_64.h

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