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TeraPool merge request preview #82

Merged
merged 24 commits into from
Dec 12, 2023
Merged

TeraPool merge request preview #82

merged 24 commits into from
Dec 12, 2023

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yichao-zh
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Summarize the changes concisely.

Changelog

  • RTL changes:
    -Tile/Group/Cluster levels now could make by config for both TeraPool and MemPool;
    -Add new Subgroup RTL;
  • Testbench changes for TeraPool's hierarchy name, and some changes for post-layout simulation.
  • QuestaSim waveform scripts update for TeraPool.

Added

  • Subgroup RTL file

Changed

  • Tile/Group/Cluster level RTL files.
  • mempool.tb
  • Bender.yml
  • hardware/Makefile
  • config.mk and terapool.mk

Fixed

(Reference to issues, labels, and related merge requests)

Checklist

  • Automated tests pass
  • Changelog updated
  • Code style guideline is observed

Please check our contributing guidelines before opening a Pull Request.

@yichao-zh yichao-zh requested a review from mbertuletti May 18, 2023 14:26
@yichao-zh yichao-zh self-assigned this May 18, 2023
mbertuletti

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@yichao-zh yichao-zh requested a review from mbertuletti July 19, 2023 12:42
SamuelRiedel
SamuelRiedel reviewed Jul 19, 2023
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@SamuelRiedel SamuelRiedel left a comment

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Thanks a lot Yichao. It looks already very good to me. I have a few comments and general questions.

  • What prevents us from using generate statements instead of ifdefs when instantiating tera/mempool things?
  • I see that the group is quite different, but for the cluster and the tile, could mempool just be the special case where we only have one subgroup per group? And then have the same instantiation of the modules and less code duplications?

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software/apps/Makefile Outdated Show resolved Hide resolved
software/apps/synth/main.c Outdated Show resolved Hide resolved
hardware/Makefile Outdated Show resolved Hide resolved
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@yichao-zh
[TeraPool] Configurations Changes for TeraPool merge into MemPool
fafdacf
@yichao-zh
[TeraPool] Full RTL Changes for TeraPool merge into MemPool
ce1df8c
@yichao-zh
[TeraPool] Testbench update, and QuestaSim waveform scripts updates f…
1cd0047 
…or TeraPool merge into MemPool
@yichao-zh
[TeraPool] Add TeraPool's energy simulation kernel
b387ea2
@yichao-zh
[TeraPool] Format the kernel for CI check
e9f3ccf
@yichao-zh
[TeraPool] Format QustaSim scripts for format checking
3709548
@yichao-zh
[TeraPool] Remove energy simulation kernel for CI clang checking
d3996c5
@yichao-zh
[Config] Defines of TeraPool put into the runtime Makefile
cfc7197
@yichao-zh
[CI format] Fix tailing whitespace issue for CI check
3e73a59
@yichao-zh
[CI format] Fix tailing line issue for CI check
ce51e52
@yichao-zh
[Kernel] Update instruction energy simulation kernel for both MemPool…
a886a81 
… and TeraPool support
@yichao-zh
[Kernel] Update the default value to avoid the CI fail
16412f9
@yichao-zh
[1st Merge Revision] Modify synth kernel, revise the configuration an…
4c18ba5 
…d pkg files
@yichao-zh
[1st Merge Revision] Format the synth kernel
cad46fd
@yichao-zh
[2nd Merge Revision] Remove the SRAM clock gate from RTL, and change …
c748566 
…the DMA numbers for TeraPool
@yichao-zh
[Barrier] Update parallel initialize barriers
4ddce01
@yichao-zh
[Parameter] Update parameters for TeraPool
da4ac18
@yichao-zh
[parameter] Update AXI radix
8a4ee00
@yichao-zh
[parameter] Correct DMA backend numbers for MemPool and TeraPool
1f4a893
@yichao-zh
[TeraPool] Rebase on the main branch; Update the variable control sty…
7fcf586 
…le in Makefile and config files
SamuelRiedel
SamuelRiedel approved these changes Dec 12, 2023
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Thanks a lot. LGTM and ready to merge.

mbertuletti
mbertuletti approved these changes Dec 12, 2023
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@mbertuletti mbertuletti left a comment

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All good for me, thank you for fixing the barrier initialization.
Did you modify the Changelog?

@yichao-zh yichao-zh merged commit 45a9e81 into main Dec 12, 2023
62 checks passed
@yichao-zh yichao-zh deleted the terapool_merge branch December 12, 2023 16:59
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@mbertuletti mbertuletti mbertuletti approved these changes

@SamuelRiedel SamuelRiedel SamuelRiedel approved these changes

@suehtamacv suehtamacv Awaiting requested review from suehtamacv

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3 participants
@yichao-zh @SamuelRiedel @mbertuletti