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sw: Adding OpenMP target runtime
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CyrilKoe committed Nov 7, 2024
1 parent d5d0d83 commit 7463524
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Showing 15 changed files with 881 additions and 3 deletions.
4 changes: 3 additions & 1 deletion target/sim/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -433,7 +433,9 @@ PLATFORM_HEADERS += $(PLATFORM_HEADERS_DIR)/snitch_quad_peripheral.h
PLATFORM_HEADERS += $(PLATFORM_HEADERS_DIR)/snitch_hbm_xbar_peripheral.h
PLATFORM_HEADERS += $(PLATFORM_HEADERS_DIR)/idma.h

.PHONY: sw clean-headers clean-sw
.PHONY: sw all-headers clean-headers clean-sw

all-headers: $(PLATFORM_HEADERS)

sw: $(PLATFORM_HEADERS)
$(MAKE) -C sw/ all
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1 change: 1 addition & 0 deletions target/sim/sw/device/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -7,6 +7,7 @@
# Add user applications to APPS variable
APPS = blas/axpy
APPS += blas/gemm
APPS += libomptarget_device

TARGET ?= all

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5 changes: 5 additions & 0 deletions target/sim/sw/device/apps/common.mk
Original file line number Diff line number Diff line change
Expand Up @@ -32,7 +32,9 @@ BUILDDIR = $(abspath build)
# Dependencies
INCDIRS += $(RUNTIME_DIR)/src
INCDIRS += $(SNRT_DIR)/api
INCDIRS += $(SNRT_DIR)/api/omp
INCDIRS += $(SNRT_DIR)/src
INCDIRS += $(SNRT_DIR)/src/omp
INCDIRS += $(SNRT_DIR)/vendor/riscv-opcodes
INCDIRS += $(SW_DIR)/shared/platform/generated
INCDIRS += $(SW_DIR)/shared/platform
Expand Down Expand Up @@ -99,6 +101,9 @@ $(BUILDDIR):
$(DEP): $(SRCS) | $(BUILDDIR)
$(RISCV_CC) $(RISCV_CFLAGS) -MM -MT '$(ELF)' $< > $@

$(BUILDDIR)/%.o: $(SRC_DIR)/%.c | $(BUILDDIR)
$(RISCV_CC) $(RISCV_CFLAGS) -c $< -o $@

$(ELF): $(DEP) $(LD_SRCS) | $(BUILDDIR)
$(RISCV_CC) $(RISCV_CFLAGS) $(RISCV_LDFLAGS) $(SRCS) -o $@

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32 changes: 32 additions & 0 deletions target/sim/sw/device/apps/libomptarget_device/Makefile
Original file line number Diff line number Diff line change
@@ -0,0 +1,32 @@
# Copyright 2023 ETH Zurich and University of Bologna.
# Licensed under the Apache License, Version 2.0, see LICENSE for details.
# SPDX-License-Identifier: Apache-2.0
#
# Cyril Koenig <cykoenig@iis.ee.ethz.ch>

# Usage of absolute paths is required to externally include this Makefile
MK_DIR := $(dir $(realpath $(lastword $(MAKEFILE_LIST))))
SRC_DIR := $(realpath $(MK_DIR)/src)

APP ?= omptarget_device
SRCS ?= $(SRC_DIR)/main.c $(SRC_DIR)/sw_mailbox.c
INCDIRS += $(SRC_DIR)

.PHONY: clean
clean:

include ../common.mk

OBJS := $(subst $(SRC_DIR), $(BUILDDIR), $(SRCS:.c=.o))
LIB := $(BUILDDIR)/libomptarget_device.a

$(BUILDDIR)/origin.ld: | $(BUILDDIR)
echo "L3_ORIGIN = 0xC0000000;" > $(BUILDDIR)/origin.ld

# We first extract objects from libnnruntime and then link them with our objects
$(BUILDDIR)/libomptarget_device.a: $(OBJS) | $(BUILDDIR)
cd $(BUILDDIR) && $(RISCV_AR) -x $(SNRT_LIB_DIR)/lib$(SNRT_LIB_NAME).a
$(RISCV_AR) $(RISCV_ARFLAGS) $@ $(BUILDDIR)/*.o

# For this target, only build the library
all: $(LIB)
130 changes: 130 additions & 0 deletions target/sim/sw/device/apps/libomptarget_device/link.ld
Original file line number Diff line number Diff line change
@@ -0,0 +1,130 @@
/* Copyright 2020 ETH Zurich and University of Bologna. */
/* Solderpad Hardware License, Version 0.51, see LICENSE for details. */
/* SPDX-License-Identifier: SHL-0.51 */

OUTPUT_ARCH( "riscv" )
ENTRY(_start)

/* Memory section should be provided in a separate, platform-specific */
/* file. It should define at least the L1 and L3 memory blocks. */
MEMORY
{
L3 : ORIGIN = 0xC0000000, LENGTH = 0x800000
}

SECTIONS
{

/* Program code goes into L3 */
.text :
{
. = ALIGN(4);
*(.init)
*(.text.init)
*(.text.startup)
*(.text)
*(.text*)
*(.text)
. = ALIGN(4);
_etext = .;
} >L3

/* By default, constant data goes into L3, right after code section */
.rodata :
{
. = ALIGN(4);
*(.rodata)
*(.rodata*)
. = ALIGN(4);
} >L3

/* HTIF section for FESVR */
.htif : { } >L3

/* Thread Local Storage sections */
.tdata :
{
__tdata_start = .;
*(.tdata .tdata.* .gnu.linkonce.td.*)
__tdata_end = .;
} >L3
.tbss :
{
__tbss_start = .;
*(.tbss .tbss.* .gnu.linkonce.tb.*)
*(.tcommon)
__tbss_end = .;
} >L3

/* Cluster Local Storage sections */
.cdata :
{
__cdata_start = .;
*(.cdata .cdata.*)
__cdata_end = .;
} >L3
.cbss :
{
__cbss_start = .;
*(.cbss .cbss.*)
__cbss_end = .;
} >L3

/* used by the startup to initialize data */
_sidata = LOADADDR(.data);

/* small data section that can be addressed through the global pointer */
.sdata :
{
__SDATA_BEGIN__ = .;
__global_pointer$ = . + 0x7f0;
*(.srodata.cst16) *(.srodata.cst8) *(.srodata.cst4) *(.srodata.cst2) *(.srodata .srodata.*)
*(.sdata .sdata.* .gnu.linkonce.s.*)
} >L3

/* Initialized data sections goes into L3 */
.data :
{
__DATA_BEGIN__ = .;
*(.data .data.* .gnu.linkonce.d.*)
SORT(CONSTRUCTORS)
} >L3
_edata = .; PROVIDE (edata = .);

/* small bss section */
. = .;
__bss_start = .;
.sbss :
{
*(.dynsbss)
*(.sbss .sbss.* .gnu.linkonce.sb.*)
*(.scommon)
} >L3

/* Uninitialized data section */
.bss :
{
*(.dynbss)
*(.bss .bss.* .gnu.linkonce.b.*)
*(COMMON)
/* Align here to ensure that the .bss section occupies space up to
_end. Align after .bss to ensure correct alignment even if the
.bss section disappears because there are no input sections. */
. = ALIGN(. != 0 ? 32 / 8 : 1);
} >L3
. = ALIGN(32 / 8);
. = SEGMENT_START("ldata-segment", .);
. = ALIGN(32 / 8);
__BSS_END__ = .;
__bss_end = .;
_end = .; PROVIDE (end = .);

/* Uninitialized data section in L3 */
.dram :
{
*(.dram)
_edram = .;
} >L3

__uart = 0x2002000;
}
77 changes: 77 additions & 0 deletions target/sim/sw/device/apps/libomptarget_device/src/debug.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,77 @@
// Copyright 2020 ETH Zurich and University of Bologna.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
#pragma once

#include <stdint.h>

#ifdef __cplusplus
extern "C" {
#endif

extern uint32_t snrt_log_level;

static inline void snrt_debug_set_loglevel(uint32_t lvl) { snrt_log_level = lvl; };

#define LOG_ERROR 0
#define LOG_WARN 1
#define LOG_INFO 2
#define LOG_DEBUG 3
#define LOG_TRACE 4

#if defined(DEBUG)

#define snrt_error(fmt, ...) \
({ \
if (LOG_ERROR <= snrt_log_level) \
snrt_printf("[\033[31msnrt(%d,%d):error:%s\033[0m] " fmt, snrt_cluster_idx(), \
snrt_cluster_core_idx(), __func__, ##__VA_ARGS__); \
})
#define snrt_warn(fmt, ...) \
({ \
if (LOG_WARN <= snrt_log_level) \
snrt_printf("[\033[91msnrt(%d,%d):warn:%s\033[0m] " fmt, snrt_cluster_idx(), \
snrt_cluster_core_idx(), __func__, ##__VA_ARGS__); \
})
#define snrt_info(fmt, ...) \
({ \
if (LOG_INFO <= snrt_log_level) \
snrt_printf("[\033[33msnrt(%d,%d):info:%s\033[0m] " fmt, snrt_cluster_idx(), \
snrt_cluster_core_idx(), __func__, ##__VA_ARGS__); \
})
#define snrt_debug(fmt, ...) \
({ \
if (LOG_DEBUG <= snrt_log_level) \
snrt_printf("[\033[35msnrt(%d,%d):debug:%s\033[0m] " fmt, snrt_cluster_idx(), \
snrt_cluster_core_idx(), __func__, ##__VA_ARGS__); \
})
#define snrt_trace(fmt, ...) \
({ \
if (LOG_TRACE <= snrt_log_level) \
snrt_printf("[\033[96msnrt(%d,%d):trace:%s\033[0m] " fmt, snrt_cluster_idx(), \
snrt_cluster_core_idx(), __func__, ##__VA_ARGS__); \
})

#else // #if defined(DEBUG)

#define snrt_error(x...) \
do { \
} while (0)
#define snrt_warn(x...) \
do { \
} while (0)
#define snrt_info(x...) \
do { \
} while (0)
#define snrt_debug(x...) \
do { \
} while (0)
#define snrt_trace(x...) \
do { \
} while (0)

#endif // defined(SNRT_DEBUG)

#ifdef __cplusplus
}
#endif
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