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/* | ||
* Luka Macan <luka.macan@unibo.it> | ||
* | ||
* Copyright 2023 ETH Zurich and University of Bologna | ||
* | ||
* Licensed under the Apache License, Version 2.0 (the "License"); | ||
* you may not use this file except in compliance with the License. | ||
* You may obtain a copy of the License at | ||
* | ||
* http://www.apache.org/licenses/LICENSE-2.0 | ||
* | ||
* Unless required by applicable law or agreed to in writing, software | ||
* distributed under the License is distributed on an "AS IS" BASIS, | ||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
* See the License for the specific language governing permissions and | ||
* limitations under the License. | ||
* | ||
* SPDX-License-Identifier: Apache-2.0 | ||
*/ | ||
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#include "neureka_astral_bsp.h" | ||
#include <pmsis.h> | ||
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#define NEUREKA_ASTRAL_CLUSTER_CTRL_BASE_ADDR (0x50200000) | ||
#define NEUREKA_ASTRAL_CLUSTER_CTRL_HWPE_OFFS 0x18 | ||
#define NEUREKA_ASTRAL_CLUSTER_CTRL_HWPE_ADDR \ | ||
(NEUREKA_ASTRAL_CLUSTER_CTRL_BASE_ADDR + \ | ||
NEUREKA_ASTRAL_CLUSTER_CTRL_HWPE_OFFS) | ||
#define NEUREKA_ASTRAL_CLUSTER_CTRL_HWPE_MASK_CG_EN 0x800 | ||
#define NEUREKA_ASTRAL_CLUSTER_CTRL_HWPE_MASK_NEUREKA_SEL 0x2000 | ||
#define NEUREKA_ASTRAL_CLUSTER_CTRL_HWPE_MASK_HCI_PRIO 0x100 | ||
#define NEUREKA_ASTRAL_CLUSTER_CTRL_HWPE_MASK_HCI_MAXSTALL 0xff | ||
#define NEUREKA_ASTRAL_MAX_STALL (8) | ||
#define NEUREKA_ASTRAL_EVENT (1 << 12) | ||
#define NEUREKA_ASTRAL_BASE_ADDR (0x50201000) | ||
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void neureka_astral_cg_enable() { | ||
*(volatile uint32_t *)NEUREKA_ASTRAL_CLUSTER_CTRL_HWPE_ADDR |= | ||
NEUREKA_ASTRAL_CLUSTER_CTRL_HWPE_MASK_CG_EN; | ||
} | ||
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void neureka_astral_cg_disable() { | ||
*(volatile uint32_t *)NEUREKA_ASTRAL_CLUSTER_CTRL_HWPE_ADDR &= | ||
~NEUREKA_ASTRAL_CLUSTER_CTRL_HWPE_MASK_CG_EN; | ||
} | ||
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void neureka_astral_neureka_select() { | ||
*(volatile uint32_t *)NEUREKA_ASTRAL_CLUSTER_CTRL_HWPE_ADDR |= | ||
NEUREKA_ASTRAL_CLUSTER_CTRL_HWPE_MASK_NEUREKA_SEL; | ||
} | ||
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void neureka_astral_neureka_unselect() { | ||
*(volatile uint32_t *)NEUREKA_ASTRAL_CLUSTER_CTRL_HWPE_ADDR &= | ||
~NEUREKA_ASTRAL_CLUSTER_CTRL_HWPE_MASK_NEUREKA_SEL; | ||
} | ||
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void neureka_astral_hci_setpriority_neureka() { | ||
*(volatile uint32_t *)NEUREKA_ASTRAL_CLUSTER_CTRL_HWPE_ADDR |= | ||
NEUREKA_ASTRAL_CLUSTER_CTRL_HWPE_MASK_HCI_PRIO; | ||
} | ||
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void neureka_astral_hci_setpriority_core() { | ||
*(volatile uint32_t *)NEUREKA_ASTRAL_CLUSTER_CTRL_HWPE_ADDR &= | ||
~NEUREKA_ASTRAL_CLUSTER_CTRL_HWPE_MASK_HCI_PRIO; | ||
} | ||
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void neureka_astral_hci_reset_max_stall() { | ||
*(volatile uint32_t *)NEUREKA_ASTRAL_CLUSTER_CTRL_HWPE_ADDR &= | ||
~NEUREKA_ASTRAL_CLUSTER_CTRL_HWPE_MASK_HCI_MAXSTALL; | ||
} | ||
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void neureka_astral_hci_set_max_stall(uint32_t max_stall) { | ||
*(volatile uint32_t *)NEUREKA_ASTRAL_CLUSTER_CTRL_HWPE_ADDR |= | ||
max_stall & NEUREKA_ASTRAL_CLUSTER_CTRL_HWPE_MASK_HCI_MAXSTALL; | ||
} | ||
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void neureka_astral_open(neureka_astral_conf_t *conf) { | ||
neureka_astral_cg_enable(); | ||
neureka_astral_neureka_select(); | ||
neureka_astral_hci_setpriority_neureka(); | ||
neureka_astral_hci_set_max_stall(conf->max_stall); | ||
} | ||
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void neureka_astral_close() { | ||
neureka_astral_cg_disable(); | ||
neureka_astral_neureka_unselect(); | ||
neureka_astral_hci_reset_max_stall(); | ||
neureka_astral_hci_setpriority_core(); | ||
} | ||
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void neureka_astral_event_wait_and_clear() { | ||
eu_evt_maskWaitAndClr(NEUREKA_ASTRAL_EVENT); | ||
} | ||
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static const neureka_dev_t neureka_astral_dev = { | ||
.hwpe_dev = (struct hwpe_dev_t){ | ||
.base_addr = (volatile uint32_t *)NEUREKA_ASTRAL_BASE_ADDR}}; | ||
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const neureka_dev_t *neureka_astral_get_dev() { | ||
return &neureka_astral_dev; | ||
} |
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/* | ||
* Luka Macan <luka.macan@unibo.it> | ||
* | ||
* Copyright 2023 ETH Zurich and University of Bologna | ||
* | ||
* Licensed under the Apache License, Version 2.0 (the "License"); | ||
* you may not use this file except in compliance with the License. | ||
* You may obtain a copy of the License at | ||
* | ||
* http://www.apache.org/licenses/LICENSE-2.0 | ||
* | ||
* Unless required by applicable law or agreed to in writing, software | ||
* distributed under the License is distributed on an "AS IS" BASIS, | ||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
* See the License for the specific language governing permissions and | ||
* limitations under the License. | ||
* | ||
* SPDX-License-Identifier: Apache-2.0 | ||
*/ | ||
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#ifndef __NEUREKA_ASTRAL_BSP_H__ | ||
#define __NEUREKA_ASTRAL_BSP_H__ | ||
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#include "neureka.h" | ||
#include <stdint.h> | ||
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/** | ||
* neureka_astral_setpriority_neureka | ||
* | ||
* Set HCI interconnect bus priority to prioritize neureka. | ||
*/ | ||
void neureka_astral_hci_setpriority_neureka(); | ||
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/** | ||
* neureka_astral_setpriority_core | ||
* | ||
* Set HCI bus priority to prioritize cores. | ||
*/ | ||
void neureka_astral_hci_setpriority_core(); | ||
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/** | ||
* neureka_astral_hci_reset_maxstall | ||
* | ||
* Reset the HCI bus maxstall parameter. | ||
* TODO: Check if it disables it also or just resets? | ||
*/ | ||
void neureka_astral_hci_reset_max_stall(); | ||
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/** | ||
* neureka_astral_hci_set_maxstall | ||
* | ||
* Set the HCI bus maxstall. Maxstall defines how many cycles | ||
* will the HCI bus stall the lower priority master, i.e. neureka or core, | ||
* before letting it do a transaction. | ||
*/ | ||
void neureka_astral_hci_set_max_stall(uint32_t max_stall); | ||
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typedef struct neureka_astral_conf_t { | ||
int max_stall; | ||
} neureka_astral_conf_t; | ||
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void neureka_astral_open(neureka_astral_conf_t *conf); | ||
void neureka_astral_close(); | ||
void neureka_astral_event_wait_and_clear(); | ||
const neureka_dev_t *neureka_astral_get_dev(); | ||
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#endif // !__NEUREKA_ASTRAL_BSP_H__ |
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