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Replace AXI interfaces with structs
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@micprog
micprog committed Feb 9, 2024
1 parent 00eebd8 commit 45d06ab
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Showing 6 changed files with 549 additions and 495 deletions.
101 changes: 52 additions & 49 deletions rtl/axi2mem_wrap.sv
View file
Original file line number Diff line number Diff line change
Expand Up @@ -22,13 +22,16 @@ module axi2mem_wrap
parameter int unsigned AXI_ADDR_WIDTH = 32,
parameter int unsigned AXI_DATA_WIDTH = 64,
parameter int unsigned AXI_USER_WIDTH = 6,
parameter int unsigned AXI_ID_WIDTH = 6
parameter int unsigned AXI_ID_WIDTH = 6,
parameter type axi_req_t = logic,
parameter type axi_resp_t = logic
)
(
input logic clk_i,
input logic rst_ni,
input logic test_en_i,
AXI_BUS.Slave axi_slave,
input logic clk_i,
input logic rst_ni,
input logic test_en_i,
input axi_req_t axi_slave_req_i,
output axi_resp_t axi_slave_resp_o,
hci_core_intf.master tcdm_master[NB_DMAS-1:0],
output logic busy_o
);
Expand Down Expand Up @@ -81,54 +84,54 @@ module axi2mem_wrap
.busy_o ( busy_o ),
.test_en_i ( test_en_i ),

.axi_slave_aw_valid_i ( axi_slave.aw_valid ),
.axi_slave_aw_addr_i ( axi_slave.aw_addr ),
.axi_slave_aw_prot_i ( axi_slave.aw_prot ),
.axi_slave_aw_region_i ( axi_slave.aw_region ),
.axi_slave_aw_len_i ( axi_slave.aw_len ),
.axi_slave_aw_size_i ( axi_slave.aw_size ),
.axi_slave_aw_burst_i ( axi_slave.aw_burst ),
.axi_slave_aw_lock_i ( axi_slave.aw_lock ),
.axi_slave_aw_cache_i ( axi_slave.aw_cache ),
.axi_slave_aw_qos_i ( axi_slave.aw_qos ),
.axi_slave_aw_id_i ( axi_slave.aw_id ),
.axi_slave_aw_user_i ( axi_slave.aw_user ),
.axi_slave_aw_ready_o ( axi_slave.aw_ready ),
.axi_slave_aw_valid_i ( axi_slave_req_i.aw_valid ),
.axi_slave_aw_addr_i ( axi_slave_req_i.aw.addr ),
.axi_slave_aw_prot_i ( axi_slave_req_i.aw.prot ),
.axi_slave_aw_region_i ( axi_slave_req_i.aw.region ),
.axi_slave_aw_len_i ( axi_slave_req_i.aw.len ),
.axi_slave_aw_size_i ( axi_slave_req_i.aw.size ),
.axi_slave_aw_burst_i ( axi_slave_req_i.aw.burst ),
.axi_slave_aw_lock_i ( axi_slave_req_i.aw.lock ),
.axi_slave_aw_cache_i ( axi_slave_req_i.aw.cache ),
.axi_slave_aw_qos_i ( axi_slave_req_i.aw.qos ),
.axi_slave_aw_id_i ( axi_slave_req_i.aw.id ),
.axi_slave_aw_user_i ( axi_slave_req_i.aw.user ),
.axi_slave_aw_ready_o ( axi_slave_resp_o.aw_ready ),

.axi_slave_ar_valid_i ( axi_slave.ar_valid ),
.axi_slave_ar_addr_i ( axi_slave.ar_addr ),
.axi_slave_ar_prot_i ( axi_slave.ar_prot ),
.axi_slave_ar_region_i ( axi_slave.ar_region ),
.axi_slave_ar_len_i ( axi_slave.ar_len ),
.axi_slave_ar_size_i ( axi_slave.ar_size ),
.axi_slave_ar_burst_i ( axi_slave.ar_burst ),
.axi_slave_ar_lock_i ( axi_slave.ar_lock ),
.axi_slave_ar_cache_i ( axi_slave.ar_cache ),
.axi_slave_ar_qos_i ( axi_slave.ar_qos ),
.axi_slave_ar_id_i ( axi_slave.ar_id ),
.axi_slave_ar_user_i ( axi_slave.ar_user ),
.axi_slave_ar_ready_o ( axi_slave.ar_ready ),
.axi_slave_ar_valid_i ( axi_slave_req_i.ar_valid ),
.axi_slave_ar_addr_i ( axi_slave_req_i.ar.addr ),
.axi_slave_ar_prot_i ( axi_slave_req_i.ar.prot ),
.axi_slave_ar_region_i ( axi_slave_req_i.ar.region ),
.axi_slave_ar_len_i ( axi_slave_req_i.ar.len ),
.axi_slave_ar_size_i ( axi_slave_req_i.ar.size ),
.axi_slave_ar_burst_i ( axi_slave_req_i.ar.burst ),
.axi_slave_ar_lock_i ( axi_slave_req_i.ar.lock ),
.axi_slave_ar_cache_i ( axi_slave_req_i.ar.cache ),
.axi_slave_ar_qos_i ( axi_slave_req_i.ar.qos ),
.axi_slave_ar_id_i ( axi_slave_req_i.ar.id ),
.axi_slave_ar_user_i ( axi_slave_req_i.ar.user ),
.axi_slave_ar_ready_o ( axi_slave_resp_o.ar_ready ),

.axi_slave_w_valid_i ( axi_slave.w_valid ),
.axi_slave_w_data_i ( axi_slave.w_data ),
.axi_slave_w_strb_i ( axi_slave.w_strb ),
.axi_slave_w_user_i ( axi_slave.w_user ),
.axi_slave_w_last_i ( axi_slave.w_last ),
.axi_slave_w_ready_o ( axi_slave.w_ready ),
.axi_slave_w_valid_i ( axi_slave_req_i.w_valid ),
.axi_slave_w_data_i ( axi_slave_req_i.w.data ),
.axi_slave_w_strb_i ( axi_slave_req_i.w.strb ),
.axi_slave_w_user_i ( axi_slave_req_i.w.user ),
.axi_slave_w_last_i ( axi_slave_req_i.w.last ),
.axi_slave_w_ready_o ( axi_slave_resp_o.w_ready ),

.axi_slave_r_valid_o ( axi_slave.r_valid ),
.axi_slave_r_data_o ( axi_slave.r_data ),
.axi_slave_r_resp_o ( axi_slave.r_resp ),
.axi_slave_r_last_o ( axi_slave.r_last ),
.axi_slave_r_id_o ( axi_slave.r_id ),
.axi_slave_r_user_o ( axi_slave.r_user ),
.axi_slave_r_ready_i ( axi_slave.r_ready ),
.axi_slave_r_valid_o ( axi_slave_resp_o.r_valid ),
.axi_slave_r_data_o ( axi_slave_resp_o.r.data ),
.axi_slave_r_resp_o ( axi_slave_resp_o.r.resp ),
.axi_slave_r_last_o ( axi_slave_resp_o.r.last ),
.axi_slave_r_id_o ( axi_slave_resp_o.r.id ),
.axi_slave_r_user_o ( axi_slave_resp_o.r.user ),
.axi_slave_r_ready_i ( axi_slave_req_i.r_ready ),

.axi_slave_b_valid_o ( axi_slave.b_valid ),
.axi_slave_b_resp_o ( axi_slave.b_resp ),
.axi_slave_b_id_o ( axi_slave.b_id ),
.axi_slave_b_user_o ( axi_slave.b_user ),
.axi_slave_b_ready_i ( axi_slave.b_ready )
.axi_slave_b_valid_o ( axi_slave_resp_o.b_valid ),
.axi_slave_b_resp_o ( axi_slave_resp_o.b.resp ),
.axi_slave_b_id_o ( axi_slave_resp_o.b.id ),
.axi_slave_b_user_o ( axi_slave_resp_o.b.user ),
.axi_slave_b_ready_i ( axi_slave_req_i.b_ready )
);

endmodule
101 changes: 52 additions & 49 deletions rtl/axi2per_wrap.sv
View file
Original file line number Diff line number Diff line change
Expand Up @@ -25,13 +25,16 @@ module axi2per_wrap
parameter int unsigned AXI_USER_WIDTH = 6,
parameter int unsigned AXI_ID_WIDTH = 6,
parameter int unsigned BUFFER_DEPTH = 2,
parameter int unsigned AXI_STRB_WIDTH = AXI_DATA_WIDTH/8
parameter int unsigned AXI_STRB_WIDTH = AXI_DATA_WIDTH/8,
parameter type axi_req_t = logic,
parameter type axi_resp_t = logic
)
(
input logic clk_i,
input logic rst_ni,
input logic test_en_i,
AXI_BUS.Slave axi_slave,
input logic clk_i,
input logic rst_ni,
input logic test_en_i,
input axi_req_t axi_slave_req_i,
output axi_resp_t axi_slave_resp_o,
XBAR_TCDM_BUS.Master periph_master,
output logic busy_o
);
Expand All @@ -49,54 +52,54 @@ module axi2per_wrap
.rst_ni ( rst_ni ),
.test_en_i ( test_en_i ),

.axi_slave_aw_valid_i ( axi_slave.aw_valid ),
.axi_slave_aw_addr_i ( axi_slave.aw_addr ),
.axi_slave_aw_prot_i ( axi_slave.aw_prot ),
.axi_slave_aw_region_i ( axi_slave.aw_region ),
.axi_slave_aw_len_i ( axi_slave.aw_len ),
.axi_slave_aw_size_i ( axi_slave.aw_size ),
.axi_slave_aw_burst_i ( axi_slave.aw_burst ),
.axi_slave_aw_lock_i ( axi_slave.aw_lock ),
.axi_slave_aw_cache_i ( axi_slave.aw_cache ),
.axi_slave_aw_qos_i ( axi_slave.aw_qos ),
.axi_slave_aw_id_i ( axi_slave.aw_id ),
.axi_slave_aw_user_i ( axi_slave.aw_user ),
.axi_slave_aw_ready_o ( axi_slave.aw_ready ),
.axi_slave_aw_valid_i ( axi_slave_req_i.aw_valid ),
.axi_slave_aw_addr_i ( axi_slave_req_i.aw.addr ),
.axi_slave_aw_prot_i ( axi_slave_req_i.aw.prot ),
.axi_slave_aw_region_i ( axi_slave_req_i.aw.region ),
.axi_slave_aw_len_i ( axi_slave_req_i.aw.len ),
.axi_slave_aw_size_i ( axi_slave_req_i.aw.size ),
.axi_slave_aw_burst_i ( axi_slave_req_i.aw.burst ),
.axi_slave_aw_lock_i ( axi_slave_req_i.aw.lock ),
.axi_slave_aw_cache_i ( axi_slave_req_i.aw.cache ),
.axi_slave_aw_qos_i ( axi_slave_req_i.aw.qos ),
.axi_slave_aw_id_i ( axi_slave_req_i.aw.id ),
.axi_slave_aw_user_i ( axi_slave_req_i.aw.user ),
.axi_slave_aw_ready_o ( axi_slave_resp_o.aw_ready ),

.axi_slave_ar_valid_i ( axi_slave.ar_valid ),
.axi_slave_ar_addr_i ( axi_slave.ar_addr ),
.axi_slave_ar_prot_i ( axi_slave.ar_prot ),
.axi_slave_ar_region_i ( axi_slave.ar_region ),
.axi_slave_ar_len_i ( axi_slave.ar_len ),
.axi_slave_ar_size_i ( axi_slave.ar_size ),
.axi_slave_ar_burst_i ( axi_slave.ar_burst ),
.axi_slave_ar_lock_i ( axi_slave.ar_lock ),
.axi_slave_ar_cache_i ( axi_slave.ar_cache ),
.axi_slave_ar_qos_i ( axi_slave.ar_qos ),
.axi_slave_ar_id_i ( axi_slave.ar_id ),
.axi_slave_ar_user_i ( axi_slave.ar_user ),
.axi_slave_ar_ready_o ( axi_slave.ar_ready ),
.axi_slave_ar_valid_i ( axi_slave_req_i.ar_valid ),
.axi_slave_ar_addr_i ( axi_slave_req_i.ar.addr ),
.axi_slave_ar_prot_i ( axi_slave_req_i.ar.prot ),
.axi_slave_ar_region_i ( axi_slave_req_i.ar.region ),
.axi_slave_ar_len_i ( axi_slave_req_i.ar.len ),
.axi_slave_ar_size_i ( axi_slave_req_i.ar.size ),
.axi_slave_ar_burst_i ( axi_slave_req_i.ar.burst ),
.axi_slave_ar_lock_i ( axi_slave_req_i.ar.lock ),
.axi_slave_ar_cache_i ( axi_slave_req_i.ar.cache ),
.axi_slave_ar_qos_i ( axi_slave_req_i.ar.qos ),
.axi_slave_ar_id_i ( axi_slave_req_i.ar.id ),
.axi_slave_ar_user_i ( axi_slave_req_i.ar.user ),
.axi_slave_ar_ready_o ( axi_slave_resp_o.ar_ready ),

.axi_slave_w_valid_i ( axi_slave.w_valid ),
.axi_slave_w_data_i ( axi_slave.w_data ),
.axi_slave_w_strb_i ( axi_slave.w_strb ),
.axi_slave_w_user_i ( axi_slave.w_user ),
.axi_slave_w_last_i ( axi_slave.w_last ),
.axi_slave_w_ready_o ( axi_slave.w_ready ),
.axi_slave_w_valid_i ( axi_slave_req_i.w_valid ),
.axi_slave_w_data_i ( axi_slave_req_i.w.data ),
.axi_slave_w_strb_i ( axi_slave_req_i.w.strb ),
.axi_slave_w_user_i ( axi_slave_req_i.w.user ),
.axi_slave_w_last_i ( axi_slave_req_i.w.last ),
.axi_slave_w_ready_o ( axi_slave_resp_o.w_ready ),

.axi_slave_r_valid_o ( axi_slave.r_valid ),
.axi_slave_r_data_o ( axi_slave.r_data ),
.axi_slave_r_resp_o ( axi_slave.r_resp ),
.axi_slave_r_last_o ( axi_slave.r_last ),
.axi_slave_r_id_o ( axi_slave.r_id ),
.axi_slave_r_user_o ( axi_slave.r_user ),
.axi_slave_r_ready_i ( axi_slave.r_ready ),
.axi_slave_r_valid_o ( axi_slave_resp_o.r_valid ),
.axi_slave_r_data_o ( axi_slave_resp_o.r.data ),
.axi_slave_r_resp_o ( axi_slave_resp_o.r.resp ),
.axi_slave_r_last_o ( axi_slave_resp_o.r.last ),
.axi_slave_r_id_o ( axi_slave_resp_o.r.id ),
.axi_slave_r_user_o ( axi_slave_resp_o.r.user ),
.axi_slave_r_ready_i ( axi_slave_req_i.r_ready ),

.axi_slave_b_valid_o ( axi_slave.b_valid ),
.axi_slave_b_resp_o ( axi_slave.b_resp ),
.axi_slave_b_id_o ( axi_slave.b_id ),
.axi_slave_b_user_o ( axi_slave.b_user ),
.axi_slave_b_ready_i ( axi_slave.b_ready ),
.axi_slave_b_valid_o ( axi_slave_resp_o.b_valid ),
.axi_slave_b_resp_o ( axi_slave_resp_o.b.resp ),
.axi_slave_b_id_o ( axi_slave_resp_o.b.id ),
.axi_slave_b_user_o ( axi_slave_resp_o.b.user ),
.axi_slave_b_ready_i ( axi_slave_req_i.b_ready ),

.per_master_req_o ( periph_master.req ),
.per_master_add_o ( periph_master.add ),
Expand Down
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