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Fixed connections to HMR unit and cluster peripherals.
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Yvan Tortorella committed Oct 6, 2023
1 parent 16839e2 commit 8356888
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Showing 5 changed files with 69 additions and 18 deletions.
4 changes: 2 additions & 2 deletions Bender.lock
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Expand Up @@ -83,7 +83,7 @@ packages:
- fpnew
- tech_cells_generic
event_unit_flex:
revision: 53fb3a1093aaaedfe883739fd8a3155d601210bc
revision: 28e0499374117c7b0ef4c6ad81b60d7526af886f
version: null
source:
Git: https://github.com/pulp-platform/event_unit_flex.git
Expand Down Expand Up @@ -196,7 +196,7 @@ packages:
- hwpe-stream
- tech_cells_generic
redundancy_cells:
revision: 482d2f5ed05f25c851f4048f1bd402cc0d2b58b6
revision: f206f5ecbfaa028f9eae6f0efaed9e34631d9171
version: null
source:
Git: https://github.com/pulp-platform/redundancy_cells.git
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4 changes: 2 additions & 2 deletions Bender.yml
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Expand Up @@ -16,7 +16,7 @@ dependencies:
axi2per: { git: "https://github.com/pulp-platform/axi2per.git", version: 1.0.1 }
per2axi: { git: "https://github.com/pulp-platform/per2axi.git", version: 1.0.4 }
cluster_interconnect: { git: "https://github.com/pulp-platform/cluster_interconnect.git", rev: 89e1019d64a86425211be6200770576cbdf3e8b3 } # branch: assertion-fix
event_unit_flex: { git: "https://github.com/pulp-platform/event_unit_flex.git", rev: "1.4.1" }
event_unit_flex: { git: "https://github.com/pulp-platform/event_unit_flex.git", rev: 28e0499374117c7b0ef4c6ad81b60d7526af886f } # branch: michaero/hmr
mchan: { git: "https://github.com/pulp-platform/mchan.git", rev: 7f064f205a3e0203e959b14773c4afecf56681ab } # branch: yt/fix-parametrization
idma: { git: "https://github.com/pulp-platform/iDMA.git", rev: 437ffa9dac5dea0daccfd3e8ae604d4f6ae2cdf1 } # branch: master
hier-icache: { git: "https://github.com/pulp-platform/hier-icache.git", rev: "fac03040e4901daad29c141fc481f7c5d3758e99" } # branch: yt/carfield
Expand All @@ -34,7 +34,7 @@ dependencies:
hci: { git: "https://github.com/pulp-platform/hci.git", rev: b2e6f391aa6c10c03f45b693d80a0aaddecf169b } # branch: master
register_interface: { git: "https://github.com/pulp-platform/register_interface.git", rev: 19163bb5191d2669a8cbc267cdd4ce8e60f20746 } # branch: master
common_cells: { git: "https://github.com/pulp-platform/common_cells.git", version: 1.29.0 }
redundancy_cells: { git: "https://github.com/pulp-platform/redundancy_cells.git", rev: 482d2f5ed05f25c851f4048f1bd402cc0d2b58b6 } # branch: yt/rapidrecovery
redundancy_cells: { git: "https://github.com/pulp-platform/redundancy_cells.git", rev: f206f5ecbfaa028f9eae6f0efaed9e34631d9171 } # branch: yt/rapidrecovery
redmule: { git: "https://github.com/pulp-platform/redmule.git", rev: 0fe14edd77e9a35d3d220bd78bd6b41a0e5935ea } # branch: carfield

export_include_dirs:
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15 changes: 12 additions & 3 deletions rtl/cluster_peripherals.sv
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Expand Up @@ -31,7 +31,8 @@ module cluster_peripherals
parameter EVNT_WIDTH = 8,
parameter FEATURE_DEMUX_MAPPED = 1,
parameter int unsigned NB_L1_CUTS = 16,
parameter int unsigned RW_MARGIN_WIDTH = 4
parameter int unsigned RW_MARGIN_WIDTH = 4,
parameter int unsigned NB_BARRIERS = NB_CORES
)
(
input logic clk_i,
Expand Down Expand Up @@ -84,6 +85,11 @@ module cluster_peripherals

input logic [NB_CORES-1:0] dbg_req_i,
output logic [NB_CORES-1:0] dbg_req_o,
output logic [NB_BARRIERS-1:0] barrier_matched_o,

// HMR synch requests
input logic [NB_CORES-1:0] hmr_sw_resynch_req_i,
input logic [NB_CORES-1:0] hmr_sw_synch_req_i,

// SRAM SPEED REGULATION --> TCDM
output logic [1:0] TCDM_arb_policy_o,
Expand Down Expand Up @@ -136,7 +142,10 @@ module cluster_peripherals
// decide between common or core-specific event sources
generate
for (genvar I=0; I<NB_CORES; I++) begin
assign s_cluster_events[I] = {31'd0, mbox_irq_i};
assign s_cluster_events[I][31:3] = '0;
assign s_cluster_events[I][2] = hmr_sw_resynch_req_i[I];
assign s_cluster_events[I][1] = hmr_sw_synch_req_i[I];
assign s_cluster_events[I][0] = mbox_irq_i;
assign s_acc_events[I] = hwpe_events_i[I];
assign s_timer_events[I] = {s_timer_out_hi_event,s_timer_out_lo_event};
assign s_dma_events[I][0] = dma_event_i[I];
Expand Down Expand Up @@ -249,7 +258,7 @@ module cluster_peripherals
.dbg_req_i ( dbg_req_i ),
.core_dbg_req_o ( dbg_req_o ),


.barrier_matched_o ( barrier_matched_o ),
.core_busy_i ( core_busy_i ),
.core_clock_en_o ( core_clk_en_o ),

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4 changes: 3 additions & 1 deletion rtl/core_region.sv
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Expand Up @@ -291,7 +291,9 @@ import rapid_recovery_pkg::*;
.irq_sec_i ( '0 ),
.sec_lvl_o ( ),
// Debug Interface
.debug_req_i ( debug_req_i ),
.debug_req_i ( debug_req_i |
recovery_bus_i.debug_req ),
.debug_resume_i ( recovery_bus_i.debug_resume ),
.debug_mode_o ( debug_halted_o ),
// Yet other control signals
.fetch_enable_i ( fetch_en_i ),
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60 changes: 50 additions & 10 deletions rtl/pulp_cluster.sv
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Expand Up @@ -333,6 +333,10 @@ logic s_dma_cl_event;
logic s_dma_cl_irq;
logic s_dma_fc_event;
logic s_dma_fc_irq;

logic [NB_CORES-1:0] hmr_barrier_matched;
logic [NB_CORES-1:0] hmr_dmr_sw_resynch_req, hmr_tmr_sw_resynch_req;
logic [NB_CORES-1:0] hmr_dmr_sw_synch_req, hmr_tmr_sw_synch_req;

// FIXME: iDMA
// logic s_dma_decompr_event;
Expand Down Expand Up @@ -805,6 +809,11 @@ cluster_peripherals #(
.irq_ack_i ( irq_ack ),
.dbg_req_i ( s_dbg_irq ),
.dbg_req_o ( s_core_dbg_irq ),
.barrier_matched_o ( hmr_barrier_matched ),

// HMR synch requests
.hmr_sw_resynch_req_i ( hmr_dmr_sw_resynch_req | hmr_tmr_sw_resynch_req ),
.hmr_sw_synch_req_i ( hmr_dmr_sw_synch_req | hmr_tmr_sw_synch_req ),

.fregfile_disable_o ( s_fregfile_disable ),

Expand Down Expand Up @@ -930,8 +939,7 @@ generate
.instr_r_rdata_i ( hmr2core[i].instr_rdata ),
.instr_r_valid_i ( hmr2core[i].instr_rvalid ),
//debug unit bind
.debug_req_i ( recovery_bus[i].debug_req |
s_core_dbg_irq[i] ),
.debug_req_i ( s_core_dbg_irq[i] ),
.debug_halted_o ( core2hmr[i].debug_halted ),
.debug_havereset_o ( dbg_core_havereset[i] ),
.debug_running_o ( dbg_core_running[i] ),
Expand Down Expand Up @@ -1021,6 +1029,38 @@ generate
end
endgenerate

logic [NB_CORES/3-1:0] hmr_tmr_synch;
for (genvar i = 0; i < NB_CORES/3; i++) begin
if (1'b1) begin // InterleaveGrps
assign hmr_tmr_synch[i] = hmr_barrier_matched[i + 1];
end else begin
assign hmr_tmr_synch[i] = hmr_barrier_matched[i + i/2 + 1];
end
end

logic [NB_CORES/3-1:0] hmr_tmr_sw_resynch_req_short;
logic [NB_CORES/2-1:0] hmr_dmr_sw_resynch_req_short;
always_comb begin
hmr_tmr_sw_resynch_req = '0;
hmr_dmr_sw_resynch_req = '0;

for (int i = 0; i < NB_CORES/3; i++) begin
if (1'b1) begin // InterleaveGrps
hmr_tmr_sw_resynch_req[i] = hmr_tmr_sw_resynch_req_short[i];
end else begin
hmr_tmr_sw_resynch_req[3*i] = hmr_tmr_sw_resynch_req_short[i];
end
end

for (int i = 0; i < NB_CORES/2; i++) begin
if (1'b1) begin // InterleaveGrps
hmr_dmr_sw_resynch_req[i] = hmr_dmr_sw_resynch_req_short[i];
end else begin
hmr_dmr_sw_resynch_req[2*i] = hmr_dmr_sw_resynch_req_short[i];
end
end
end

hmr_unit #(
.NumCores ( NB_CORES ),
.DMRSupported ( 1 ),
Expand All @@ -1043,17 +1083,17 @@ hmr_unit #(
.reg_request_i ( hmr_reg_req ),
.reg_response_o ( hmr_reg_rsp ),
// TMR signals
.tmr_failure_o ( ),
.tmr_error_o ( ), // Should this not be NumTMRCores? or NumCores?
.tmr_resynch_req_o ( ),
.tmr_sw_synch_req_o ( ),
.tmr_cores_synch_i ( '0 ),
.tmr_failure_o ( ),
.tmr_error_o ( ), // Should this not be NumTMRCores? or NumCores?
.tmr_resynch_req_o ( hmr_tmr_sw_resynch_req_short ),
.tmr_sw_synch_req_o ( hmr_tmr_sw_synch_req ),
.tmr_cores_synch_i ( hmr_tmr_synch ),
// DMR signals
.dmr_failure_o ( ),
.dmr_error_o ( ), // Should this not be NumDMRCores? or NumCores?
.dmr_resynch_req_o ( ),
.dmr_sw_synch_req_o ( ),
.dmr_cores_synch_i ( '0 ),
.dmr_resynch_req_o ( hmr_dmr_sw_resynch_req_short ),
.dmr_sw_synch_req_o ( hmr_dmr_sw_synch_req ),
.dmr_cores_synch_i ( hmr_barrier_matched[NB_CORES/2:1] ),
// Rapid recovery output bus
.rapid_recovery_o ( recovery_bus ),
.sys_inputs_i ( sys2hmr ),
Expand Down

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