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Added clock gating cell for HWPE Subsystem.
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Yvan Tortorella committed Sep 9, 2023
1 parent 5e2ea6a commit 94450be
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Showing 2 changed files with 13 additions and 2 deletions.
14 changes: 12 additions & 2 deletions rtl/hwpe_subsystem.sv
Original file line number Diff line number Diff line change
Expand Up @@ -26,6 +26,7 @@ module hwpe_subsystem
input logic clk,
input logic rst_n,
input logic test_mode,
input logic hwpe_en_i,

hci_core_intf.master hwpe_xbar_master,
XBAR_PERIPH_BUS.Slave hwpe_cfg_slave,
Expand All @@ -34,18 +35,27 @@ module hwpe_subsystem
output logic busy_o
);

logic hwpe_clk;

tc_clk_gating i_hwpe_clock_gate (
.clk_i ( clk ),
.en_i ( hwpe_en_i ),
.test_en_i ( test_mode ),
.clk_o ( hwpe_clk )
);

hwpe_ctrl_intf_periph #(
.ID_WIDTH ( ID_WIDTH )
) periph (
.clk ( clk )
.clk ( hwpe_clk )
);

redmule_top #(
.ID_WIDTH ( ID_WIDTH ),
.N_CORES ( N_CORES ),
.DW ( N_MASTER_PORT*32 )
) i_redmule (
.clk_i ( clk ),
.clk_i ( hwpe_clk ),
.rst_ni ( rst_n ),
.test_mode_i ( test_mode ),
.busy_o ( busy_o ),
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1 change: 1 addition & 0 deletions rtl/pulp_cluster.sv
Original file line number Diff line number Diff line change
Expand Up @@ -1167,6 +1167,7 @@ generate
.clk ( clk_i ),
.rst_n ( rst_ni ),
.test_mode ( test_mode_i ),
.hwpe_en_i ( s_hwpe_en ),
.hwpe_xbar_master ( s_hci_hwpe [0] ),
.hwpe_cfg_slave ( s_hwpe_cfg_bus ),
.evt_o ( s_hwpe_evt ),
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