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add TNN extension and tests (!)
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da-gazzi committed Jun 13, 2024
1 parent 19b4996 commit aa0f410
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Showing 5 changed files with 114 additions and 106 deletions.
2 changes: 1 addition & 1 deletion Bender.lock
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Expand Up @@ -174,7 +174,7 @@ packages:
dependencies:
- axi_slice
riscv-nn:
revision: 85946533abb9dce156130b07804bed91d853f5dc
revision: 0dfabc78b04173b24d9bf698e00b5192d1285773
version: null
source:
Git: git@iis-git.ee.ethz.ch:pulpissimov2/riscv-nn.git
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2 changes: 1 addition & 1 deletion Bender.yml
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Expand Up @@ -27,7 +27,7 @@ dependencies:
common_cells: { git: "https://github.com/pulp-platform/common_cells.git", version: 1.21.0 }
tech_cells_generic: { git: "https://github.com/pulp-platform/tech_cells_generic.git", version: 0.2.3 }
#cv32e40p: { git: "https://github.com/pulp-platform/cv32e40p.git", rev: "pulpissimo-v3.4.0-rev4"}
riscv-nn: { git: "git@iis-git.ee.ethz.ch:pulpissimov2/riscv-nn.git", rev: "85946533abb9dce156130b07804bed91d853f5dc"}
riscv-nn: { git: "git@iis-git.ee.ethz.ch:pulpissimov2/riscv-nn.git", rev: "0dfabc78b04173b24d9bf698e00b5192d1285773"}
ibex: { git: "https://github.com/lowRISC/ibex.git", rev: "pulpissimo-v6.1.1" }
scm: { git: "https://github.com/pulp-platform/scm.git", version: 1.1.0}
hwpe-datamover-example: { git: "https://github.com/pulp-platform/hwpe-datamover-example.git", version: 1.0.1 }
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9 changes: 5 additions & 4 deletions Makefile
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Expand Up @@ -32,7 +32,7 @@ endef
######################

NONFREE_REMOTE ?= git@iis-git.ee.ethz.ch:pulp-restricted/pulp-cluster-nonfree.git
NONFREE_COMMIT ?= 4195fb9221e9db757f2848a36d03c30cf5ddeaec
NONFREE_COMMIT ?= b769aa3a146e8de295382f4b877b0e58c5b68a91

nonfree-init:
git clone $(NONFREE_REMOTE) nonfree
Expand All @@ -56,16 +56,17 @@ Bender.lock:
######
# SW #
######

RT_REV ?= 2a505d42ae246a414fbe2d088928fade83794de9
TESTS_REV ?= 24957a36ec3b7dd6969106699e0bd983e6291c37
## Clone pulp-runtime as SW stack
pulp-runtime:
git clone https://github.com/pulp-platform/pulp-runtime.git $@
cd $@; git checkout 2a505d42ae246a414fbe2d088928fade83794de9; cd ..
cd $@; git checkout $(RT_REV); cd ..

## Clone regression tests for bare-metal verification
regression-tests:
git clone https://github.com/pulp-platform/regression_tests.git $@
cd $@; git checkout 26f0f56706ab18f8f4c588c573063f82e7b55a57; cd ..
cd $@; git checkout $(TESTS_REV); cd ..

########################
# Build and simulation #
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26 changes: 15 additions & 11 deletions rtl/core_region.sv
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Expand Up @@ -46,11 +46,13 @@ module core_region
parameter int unsigned WAPUTYPE = 3,
parameter int unsigned APU_NDSFLAGS_CPU = 3,
parameter int unsigned APU_NUSFLAGS_CPU = 5,

parameter int unsigned FPU = 0,
parameter int unsigned FP_DIVSQRT = 0,
parameter int unsigned SHARED_FP = 0,
parameter int unsigned SHARED_FP_DIVSQRT = 0,
parameter int unsigned TNN_EXTENSION = 0,
parameter int unsigned TNN_UNSIGNED = 0,

parameter bit [31:0] DEBUG_START_ADDR = `DEBUG_START_ADDR,

Expand All @@ -65,12 +67,12 @@ module core_region
input logic [3:0] base_addr_i, // FOR CLUSTER VIRTUALIZATION

input logic [5:0] cluster_id_i,

input logic irq_req_i,
output logic irq_ack_o,
input logic [4:0] irq_id_i,
output logic [4:0] irq_ack_id_o,

input logic clock_en_i,
input logic fetch_en_i,
input logic fregfile_disable_i,
Expand All @@ -89,12 +91,12 @@ module core_region
input logic instr_r_valid_i,

input logic debug_req_i,

//XBAR_TCDM_BUS.Slave debug_bus,
//output logic debug_core_halted_o,
//input logic debug_core_halt_i,
//input logic debug_core_resume_i,

// Interface for DEMUX to TCDM INTERCONNECT ,PERIPHERAL INTERCONNECT and DMA CONTROLLER
hci_core_intf.master tcdm_data_master,
XBAR_TCDM_BUS.Master dma_ctrl_master,
Expand Down Expand Up @@ -135,7 +137,7 @@ module core_region
input logic [31:0] apu_master_result_i,
input logic [APU_NUSFLAGS_CPU-1:0] apu_master_flags_i
`endif


);

Expand Down Expand Up @@ -226,7 +228,9 @@ module core_region
.SHARED_FP_DIVSQRT ( SHARED_FP_DIVSQRT ),
.WAPUTYPE ( WAPUTYPE ),
.DM_HaltAddress ( DEBUG_START_ADDR + 16'h0800 ),
.Zfinx (0 )
.Zfinx ( 0 ),
.TNN_EXTENSION ( TNN_EXTENSION ),
.TNN_UNSIGNED ( TNN_UNSIGNED )

) RISCV_CORE (
.clk_i ( clk_i ),
Expand Down Expand Up @@ -284,10 +288,10 @@ module core_region

.ext_perf_counters_i ( perf_counters ),
.fregfile_disable_i ( 1'b1 ) //disable FP regfile
);
);
end else begin: CL_CORE
assign boot_addr = boot_addr_i & 32'hFFFFFF00; // RI5CY expects 0x80 offset, Ibex expects 0x00 offset (adds reset offset 0x80 internally)

if (INSTR_RDATA_WIDTH == 128) begin
instr_width_converter ibex_width_converter (
.clk_i ( clk_i ),
Expand Down Expand Up @@ -319,7 +323,7 @@ module core_region
assign core_instr_r_rdata = instr_r_rdata_i;
assign core_instr_r_valid = instr_r_valid_i;
end

obi_pulp_adapter i_obi_pulp_adapter_mem (
.clk_i (clk_i ),
.rst_ni (rst_ni ),
Expand Down Expand Up @@ -430,7 +434,7 @@ module core_region
//********************************************************
//****** DEMUX TO TCDM AND PERIPHERAL INTERCONNECT *******
//********************************************************

// demuxes to TCDM & memory hierarchy
core_demux #(
.ADDR_WIDTH ( 32 ),
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