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Connected rapid recovery signals to core.
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Yvan Tortorella committed Sep 30, 2023
1 parent 35595ad commit d5e8261
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Showing 3 changed files with 55 additions and 20 deletions.
2 changes: 0 additions & 2 deletions packages/pulp_cluster_package.sv
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Expand Up @@ -88,8 +88,6 @@ package pulp_cluster_package;
logic [31:0] data_wdata;
logic irq_ack;
logic [4:0] irq_ack_id;
// logic debug_havereset;
// logic debug_running;
logic debug_halted;
logic core_busy;
rapid_recovery_pkg::regfile_write_t regfile_backup;
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56 changes: 51 additions & 5 deletions rtl/core_region.sv
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Expand Up @@ -24,6 +24,7 @@
//`define DUMP_INSTR_FETCH

module core_region
import rapid_recovery_pkg::*;
#(
// CORE PARAMETERS
parameter CORE_TYPE_CL = 0, // 0 for CV32, 1 RI5CY, 2 for IBEX RV32IMC
Expand Down Expand Up @@ -88,6 +89,12 @@ module core_region
output logic debug_havereset_o,
output logic debug_running_o,
output logic debug_halted_o,
// Recovery bus
input rapid_recovery_pkg::rapid_recovery_t recovery_bus_i,
// Backup bus
output rapid_recovery_pkg::regfile_write_t regfile_backup_o,
output rapid_recovery_pkg::pc_intf_t pc_backup_o,
output rapid_recovery_pkg::csrs_intf_t csr_backup_o,

input logic [N_EXT_PERF_COUNTERS-1:0] ext_perf_i,

Expand Down Expand Up @@ -285,18 +292,57 @@ module core_region
.sec_lvl_o ( ),
// Debug Interface
.debug_req_i ( debug_req_i ),
// .debug_havereset_o ( debug_havereset_o ), // Useful for HMR
// .debug_running_o ( debug_running_o ), // Useful for HMR
// .debug_halted_o ( debug_halted_o ), // Useful for HMR
.debug_mode_o ( debug_halted_o ),
// Yet other control signals
.fetch_enable_i ( fetch_en_i ),
.core_busy_o ( core_busy_o ),
// External performance monitoring signals
.ext_perf_counters_i ( ext_perf_i )
.ext_perf_counters_i ( ext_perf_i ),
// RF recovery ports
.recover_i ( recovery_bus_i.rf_recovery_en ),
// Write port A
.regfile_waddr_a_i ( recovery_bus_i.rf_recovery_wdata.waddr_a ),
.regfile_wdata_a_i ( recovery_bus_i.rf_recovery_wdata.wdata_a ),
.regfile_we_a_i ( recovery_bus_i.rf_recovery_wdata.we_a ),
// Write port B
.regfile_waddr_b_i ( recovery_bus_i.rf_recovery_wdata.waddr_b ),
.regfile_wdata_b_i ( recovery_bus_i.rf_recovery_wdata.wdata_b ),
.regfile_we_b_i ( recovery_bus_i.rf_recovery_wdata.we_b ),
// Outputs from RF
// Port A
.regfile_we_a_o ( regfile_backup_o.we_a ),
.regfile_waddr_a_o ( regfile_backup_o.waddr_a ),
.regfile_wdata_a_o ( regfile_backup_o.wdata_a ),
// Port B
.regfile_we_b_o ( regfile_backup_o.we_b ),
.regfile_waddr_b_o ( regfile_backup_o.waddr_b ),
.regfile_wdata_b_o ( regfile_backup_o.wdata_b ),
// Program Counter Backup
.backup_program_counter_o ( pc_backup_o.program_counter ),
.backup_branch_o ( pc_backup_o.is_branch ),
.backup_branch_addr_o ( pc_backup_o.branch_addr ),
// Program Counter Recovery
.pc_recover_i ( recovery_bus_i.pc_recovery_en ),
.recovery_program_counter_i ( recovery_bus_i.pc_recovery.program_counter ),
.recovery_branch_i ( recovery_bus_i.pc_recovery.is_branch ),
.recovery_branch_addr_i ( recovery_bus_i.pc_recovery.branch_addr ),
// CSRs Backup
.backup_mstatus_o ( csr_backup_o.csr_mstatus ),
.backup_mtvec_o ( csr_backup_o.csr_mtvec ),
.backup_mscratch_o ( csr_backup_o.csr_mscratch ),
.backup_mepc_o ( csr_backup_o.csr_mepc ),
.backup_mcause_o ( csr_backup_o.csr_mcause ),
// CSRs Recovery
.recovery_mstatus_i ( recovery_bus_i.csr_recovery.csr_mstatus ),
.recovery_mtvec_i ( recovery_bus_i.csr_recovery.csr_mtvec ),
.recovery_mscratch_i ( recovery_bus_i.csr_recovery.csr_mscratch ),
.recovery_mepc_i ( recovery_bus_i.csr_recovery.csr_mepc ),
.recovery_mcause_i ( recovery_bus_i.csr_recovery.csr_mcause )
);
assign debug_havereset_o = '0;
assign debug_running_o = '0;
assign debug_halted_o = '0;
assign csr_backup_o.csr_mie = '0;
assign csr_backup_o.csr_mip = '0;
end else begin: IBEX_CORE
assign boot_addr = boot_addr_i & 32'hFFFFFF00; // RI5CY expects 0x80 offset, Ibex expects 0x00 offset (adds reset offset 0x80 internally)
// Core busy
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17 changes: 4 additions & 13 deletions rtl/pulp_cluster.sv
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Expand Up @@ -932,22 +932,17 @@ generate
//debug unit bind
.debug_req_i ( recovery_bus[i].debug_req |
s_core_dbg_irq[i] ),
// .debug_halted_o ( dbg_core_halted[i] ),
.debug_halted_o ( core2hmr[i].debug_halted ),
.debug_havereset_o ( dbg_core_havereset[i] ),
.debug_running_o ( dbg_core_running[i] ),
.ext_perf_i ( ext_perf[i] ),
.core_data_req_o ( core_data_req[i] ),
.core_data_rsp_i ( core_data_rsp[i] ),
// .debug_resume_i ( recovery_bus[i].debug_resume ), // Useful for HMR, consider keeping
//HMR Recovery Bus
// .csr_recovery_i ( recovery_bus[i].csr_recovery ),
// .pc_recovery_i ( recovery_bus[i].pc_recovery ),
// .instr_lock_i ( recovery_bus[i].instr_lock ),
// .pc_recovery_en ( recovery_bus[i].pc_recovery_en ),
// .rf_recovery_en ( recovery_bus[i].rf_recovery_en ),
// .rf_recovery_wdata ( recovery_bus[i].rf_recovery_wdata ),
// .rf_recovery_rdata ( recovery_bus[i].rf_recovery_rdata ),
.recovery_bus_i ( recovery_bus[i] ),
.regfile_backup_o ( core2hmr[i].regfile_backup ),
.pc_backup_o ( core2hmr[i].pc_backup ),
.csr_backup_o ( core2hmr[i].csr_backup ),
//apu interface
.apu_master_req_o ( s_apu_master_req [i] ),
.apu_master_gnt_i ( s_apu_master_gnt [i] ),
Expand Down Expand Up @@ -999,10 +994,6 @@ generate
assign core2hmr[i].data_wdata = core_data_req[i].data;
assign core2hmr[i].data_be = core_data_req[i].be;

assign core2hmr[i].regfile_backup = '0;
assign core2hmr[i].csr_backup = '0;
assign core2hmr[i].pc_backup = '0;

core_demux_wrap #(
.AddrWidth ( ADDR_WIDTH ),
.DataWidth ( DATA_WIDTH ),
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