Merge remote-tracking branch 'origin/sycl' into sycl-graph-develop

buildbot/configure.py

@@ -65,7 +65,7 @@ def do_configure(args):
     if args.enable_esimd_emulator:
         sycl_enabled_plugins.append("esimd_emulator")
 
-    if args.cuda or args.hip:
+    if args.cuda or args.hip or args.native_cpu:
         llvm_enable_projects += ';libclc'
 
     if args.cuda:
@@ -87,6 +87,12 @@ def do_configure(args):
         sycl_build_pi_hip_platform = args.hip_platform
         sycl_enabled_plugins.append("hip")
 
+    if args.native_cpu:
+        #Todo: we should set whatever targets we support for native cpu
+        libclc_targets_to_build += ';x86_64-unknown-linux-gnu'
+        sycl_enabled_plugins.append("native_cpu")
+
+
     # all llvm compiler targets don't require 3rd party dependencies, so can be
     # built/tested even if specific runtimes are not available
     if args.enable_all_llvm_targets:
@@ -234,6 +240,7 @@ def main():
     parser.add_argument("-t", "--build-type",
                         metavar="BUILD_TYPE", default="Release", help="build type: Debug, Release")
     parser.add_argument("--cuda", action='store_true', help="switch from OpenCL to CUDA")
+    parser.add_argument("--native_cpu", action='store_true', help="Enable SYCL Native CPU")
     parser.add_argument("--hip", action='store_true', help="switch from OpenCL to HIP")
     parser.add_argument("--hip-platform", type=str, choices=['AMD', 'NVIDIA'], default='AMD', help="choose hardware platform for HIP backend")
     parser.add_argument("--host-target", default='X86',

clang/include/clang/Basic/Attr.td

@@ -2493,8 +2493,6 @@ def SYCLIntelMaxInterleaving : StmtAttr {
   let LangOpts = [SYCLIsDevice, SilentlyIgnoreSYCLIsHost];
   let Documentation = [SYCLIntelMaxInterleavingAttrDocs];
 }
-def : MutualExclusions<[SYCLIntelDisableLoopPipelining,
-                        SYCLIntelMaxInterleaving]>;
 
 def SYCLIntelSpeculatedIterations : StmtAttr {
   let Spellings = [CXX11<"intel", "speculated_iterations">];

clang/include/clang/Basic/AttrDocs.td

@@ -3359,9 +3359,9 @@ def SYCLIntelDisableLoopPipeliningAttrDocs : Documentation {
 This attribute applies to a loop or a function. Takes no arguments and
 disables pipelining of the loop or function data path, causing the loop
 or function to be executed serially. Cannot be used on the same loop or
-function, or in conjunction with ``max_interleaving``,
-``speculated_iterations``, ``max_concurrency``, ``initiation_interval``,
-``ivdep``, ``max_reinvocation_delay`` or ``enable_loop_pipelining`` attribute.
+function, or in conjunction with ``speculated_iterations``, ``max_concurrency``,
+``initiation_interval``, ``ivdep``, ``max_reinvocation_delay`` or
+``enable_loop_pipelining`` attribute.
 
 .. code-block:: c++
 
@@ -3427,8 +3427,7 @@ This attribute applies to a loop. Places a maximum limit N on the number of
 interleaved invocations of an inner loop by an outer loop (note, this does not
 mean that this attribute can only be applied to inner loops in user code - outer
 loops in user code may still be contained in an implicit loop due to NDRange).
-Parameter N is mandatory, and shall be non-negative integer. Cannot be
-used on the same loop in conjunction with disable_loop_pipelining.
+Parameter N is mandatory, and shall be non-negative integer.
 
 .. code-block:: c++
 
@@ -3623,8 +3622,8 @@ where the last N*2 are as described above.
 .. Note:: This attribute will only generate LLVM IR attributes in SYCL device
   code.
 
-.. Note:: This attribute is not currently allowed on virtual, overridden, final,
-  defaulted, and deleted functions.
+.. Note:: This attribute is not currently allowed on defaulted and deleted
+  functions.
 
 .. Note:: This attribute is intended as an internal implementation detail and is
   not intended to be used by external users.

clang/include/clang/Basic/CodeGenOptions.def

@@ -427,6 +427,8 @@ VALUE_CODEGENOPT(InlineMaxStackSize, 32, UINT_MAX)
 // Vector functions library to use.
 ENUM_CODEGENOPT(VecLib, VectorLibrary, 3, NoLibrary)
 
+ENUM_CODEGENOPT(AltMathLib, AltMathLibrary, 3, NoAltMathLibrary)
+
 /// The default TLS model to use.
 ENUM_CODEGENOPT(DefaultTLSModel, TLSModel, 2, GeneralDynamicTLSModel)
 
@@ -517,10 +519,6 @@ ENUM_CODEGENOPT(ZeroCallUsedRegs, llvm::ZeroCallUsedRegs::ZeroCallUsedRegsKind,
 /// checksum calculations or not.
 CODEGENOPT(SYCLUseMainFileName, 1, 0)
 
-#ifndef INTEL_SYCL_OPAQUEPOINTER_READY
-/// Whether to use opaque pointers.
-CODEGENOPT(OpaquePointers, 1, 0)
-#endif // INTEL_SYCL_OPAQUEPOINTER_READY
 
 /// Modify C++ ABI to returning `this` pointer from constructors and
 /// non-deleting destructors. (No effect on Microsoft ABI.)

clang/include/clang/Basic/CodeGenOptions.h

@@ -65,6 +65,12 @@ class CodeGenOptions : public CodeGenOptionsBase {
     ArmPL               // Arm Performance Libraries.
   };
 
+  enum AltMathLibrary {
+    NoAltMathLibrary,   // Don't use any alternate math library
+    SVMLAltMathLibrary, // Intel SVML Library
+    TestAltMathLibrary  // Use a fake alternate math library for testing
+  };
+
   enum ObjCDispatchMethodKind {
     Legacy = 0,
     NonLegacy = 1,

clang/include/clang/Driver/Options.td

@@ -3100,6 +3100,12 @@ def fno_global_isel : Flag<["-"], "fno-global-isel">, Group<f_clang_Group>,
   HelpText<"Disables the global instruction selector">;
 def fno_experimental_isel : Flag<["-"], "fno-experimental-isel">, Group<f_clang_Group>,
   Alias<fno_global_isel>;
+def faltmathlib_EQ : Joined<["-"], "faltmathlib=">, Group<f_Group>,
+  Visibility<[ClangOption, CC1Option]>,
+    Values<"SVMLAltMathLibrary,TestAltMathLibrary,none">,
+    NormalizedValuesScope<"CodeGenOptions">,
+    NormalizedValues<["SVMLAltMathLibrary", "TestAltMathLibrary","NoAltMathLibrary"]>,
+    MarshallingInfoEnum<CodeGenOpts<"AltMathLib">, "NoAltMathLibrary">;
 def fveclib : Joined<["-"], "fveclib=">, Group<f_Group>,
   Visibility<[ClangOption, CC1Option]>,
     HelpText<"Use the given vector functions library">,
@@ -3738,6 +3744,9 @@ def fsycl_max_parallel_jobs_EQ : Joined<["-"], "fsycl-max-parallel-link-jobs=">,
   HelpText<"Experimental feature: Controls the maximum parallelism of actions performed "
   "on SYCL device code post-link, i.e. the generation of SPIR-V device images "
   "or AOT compilation of each device image.">;
+def fsycl_preserve_device_nonsemantic_metadata : Flag<["-"], "fsycl-preserve-device-nonsemantic-metadata">,
+  Visibility<[ClangOption, CLOption, DXCOption]>, Flags<[HelpHidden]>, HelpText<"Preserve non-semantic "
+  "metadata in SPIR-V device images.">;
 def ftarget_compile_fast : Flag<["-"], "ftarget-compile-fast">,
   Visibility<[ClangOption, CLOption, DXCOption]>, HelpText<"Experimental feature: Reduce target "
   "compilation time, with potential runtime performance trade-off.">;
@@ -7227,15 +7236,6 @@ defm enable_noundef_analysis : BoolOption<"",
   PosFlag<SetTrue, [], [ClangOption], "Enable">,
   NegFlag<SetFalse, [], [ClangOption], "Disable">,
   BothFlags<[], [ClangOption], " analyzing function argument and return types for mandatory definedness">>;
-#ifndef INTEL_SYCL_OPAQUEPOINTER_READY
-defm opaque_pointers : BoolOption<"",
-  "opaque-pointers",
-  CodeGenOpts<"OpaquePointers">,
-  DefaultTrue,
-  PosFlag<SetTrue, [], [ClangOption], "Enable">,
-  NegFlag<SetFalse, [], [ClangOption], "Disable">,
-  BothFlags<[], [ClangOption], " opaque pointers">>;
-#endif // INTEL_SYCL_OPAQUEPOINTER_READY
 def discard_value_names : Flag<["-"], "discard-value-names">,
   HelpText<"Discard value names in LLVM IR">,
   MarshallingInfoFlag<CodeGenOpts<"DiscardValueNames">>;

clang/include/clang/Sema/Sema.h

@@ -8248,10 +8248,6 @@ class Sema final {
   /// CheckOverrideControl - Check C++11 override control semantics.
   void CheckOverrideControl(NamedDecl *D);
 
-  /// CheckVirtualSYCLAddIRAttributesFunctionAttr - Check and diagnose if a
-  /// SYCLAddIRAttributesFunctionAttr is attached to a virtual member function.
-  void CheckVirtualSYCLAddIRAttributesFunctionAttr(const NamedDecl *D);
-
   /// DiagnoseAbsenceOfOverrideControl - Diagnose if 'override' keyword was
   /// not used in the declaration of an overriding method.
   void DiagnoseAbsenceOfOverrideControl(NamedDecl *D, bool Inconsistent);

clang/lib/Basic/TargetInfo.cpp

@@ -516,6 +516,38 @@ void TargetInfo::adjust(DiagnosticsEngine &Diags, LangOptions &Opts) {
 
   if (Opts.FakeAddressSpaceMap)
     AddrSpaceMap = &FakeAddrSpaceMap;
+
+  if (Opts.SYCLIsDevice && Opts.SYCLIsNativeCPU) {
+    // For SYCL Native CPU we use the NVPTXAddrSpaceMap because
+    // we need builtins to be mangled with AS information
+
+    static const unsigned SYCLNativeCPUASMap[] = {
+        0,  // Default
+        1,  // opencl_global
+        3,  // opencl_local
+        4,  // opencl_constant
+        0,  // opencl_private
+        0,  // opencl_generic
+        1,  // opencl_global_device
+        1,  // opencl_global_host
+        1,  // cuda_device
+        4,  // cuda_constant
+        3,  // cuda_shared
+        1,  // sycl_global
+        1,  // sycl_global_device
+        1,  // sycl_global_host
+        3,  // sycl_local
+        0,  // sycl_private
+        0,  // ptr32_sptr
+        0,  // ptr32_uptr
+        0,  // ptr64
+        0,  // hlsl_groupshared
+        20, // wasm_funcref
+    };
+
+    AddrSpaceMap = &SYCLNativeCPUASMap;
+    UseAddrSpaceMapMangling = true;
+  }
 }
 
 bool TargetInfo::initFeatureMap(

clang/lib/CodeGen/ABIInfoImpl.cpp

@@ -170,11 +170,7 @@ CodeGen::emitVoidPtrDirectVAArg(CodeGenFunction &CGF, Address VAListAddr,
   // Cast the element type to i8* if necessary.  Some platforms define
   // va_list as a struct containing an i8* instead of just an i8*.
   if (VAListAddr.getElementType() != CGF.Int8PtrTy)
-#ifndef INTEL_SYCL_OPAQUEPOINTER_READY
-    VAListAddr = CGF.Builder.CreateElementBitCast(VAListAddr, CGF.Int8PtrTy);
-#else
     VAListAddr = VAListAddr.withElementType(CGF.Int8PtrTy);
-#endif
 
   llvm::Value *Ptr = CGF.Builder.CreateLoad(VAListAddr, "argp.cur");
 
@@ -200,12 +196,7 @@ CodeGen::emitVoidPtrDirectVAArg(CodeGenFunction &CGF, Address VAListAddr,
     Addr = CGF.Builder.CreateConstInBoundsByteGEP(Addr, SlotSize - DirectSize);
   }
 
-#ifndef INTEL_SYCL_OPAQUEPOINTER_READY
-  Addr = CGF.Builder.CreateElementBitCast(Addr, DirectTy);
-  return Addr;
-#else
   return Addr.withElementType(DirectTy);
-#endif
 }
 
 Address CodeGen::emitVoidPtrVAArg(CodeGenFunction &CGF, Address VAListAddr,

clang/lib/CodeGen/BackendUtil.cpp

@@ -308,6 +308,18 @@ static TargetLibraryInfoImpl *createTLII(llvm::Triple &TargetTriple,
   default:
     break;
   }
+  switch (CodeGenOpts.getAltMathLib()) {
+  case CodeGenOptions::TestAltMathLibrary:
+    TLII->addAltMathFunctionsFromLib(
+        TargetLibraryInfoImpl::AltMathLibrary::TestAltMathLibrary);
+    break;
+  case CodeGenOptions::SVMLAltMathLibrary:
+    TLII->addAltMathFunctionsFromLib(
+        TargetLibraryInfoImpl::AltMathLibrary::SVMLAltMathLibrary);
+    break;
+  default:
+    break;
+  }
   return TLII;
 }