Skip to content

Commit

Permalink
Merge pull request #56 from TatsuyaOgawanx/20240118
Browse files Browse the repository at this point in the history
[Update] Readme
  • Loading branch information
TatsuyaOgawanx authored Jan 18, 2024
2 parents d3c0f0e + 6a8a29c commit 6e4afa6
Show file tree
Hide file tree
Showing 18 changed files with 112 additions and 6 deletions.
4 changes: 3 additions & 1 deletion README.md
Original file line number Diff line number Diff line change
Expand Up @@ -460,5 +460,7 @@ This Azure RTOS repository that includes some modules (ThreadX/NetX/FileX/etc) a
* https://www.youtube.com/watch?v=gxODyzvWSYs

# How to use Trusted Secure IP with Azure RTOS
* under constructing...
We provide an Azure RTOS sample that leverages Trusted Secure IP which is hardware acceleration for encryption processing.

Please visit Renesas Website for more details.
* [RX Family TLS Implementation Example Using TSIP Driver (Azure RTOS)](https://www.renesas.com/search?keywords=r01an6948)
6 changes: 6 additions & 0 deletions configuration/samples/bare/README.md
Original file line number Diff line number Diff line change
Expand Up @@ -35,3 +35,9 @@ For example, if you create project with C++ option and CC-RX compiler, you will
_ebss = .;
_end = .;
} > RAM

2.3. When using RX microcontrollers with DPFPU
Target projects (RX72N, RX671):
- Projects with the double precision floating point instruction generation option (CC-RX: -dpfpu, GCC: --mdfpu=64, IAR: --fpu=64) enabled on RXv3 core devices
Workaround:
- Call tx_thread_fpu_enable() at the beginning of every task.
8 changes: 8 additions & 0 deletions configuration/samples/boot_loader/README.md
Original file line number Diff line number Diff line change
Expand Up @@ -58,3 +58,11 @@ In Smart Configurator editor (<projectname>.scfg)
RXDx and TXDx should be used but the default setting could be SMISOx and SMOSIx

This issue is fixed from e2 studio 2023-04 and Smart Configurator for RX 2.17.

2.3. If your e2 studio version is older than 2023-10, "CK-RX65N (DUAL)" will not be displayed on the Target Board when creating ADU sample project. Please use the latest version of e2 studio.

2.4. When using RX microcontrollers with DPFPU
Target projects (RX72N, RX671):
- Projects with the double precision floating point instruction generation option (CC-RX: -dpfpu, GCC: --mdfpu=64, IAR: --fpu=64) enabled on RXv3 core devices
Workaround:
- Call tx_thread_fpu_enable() at the beginning of every task.
6 changes: 6 additions & 0 deletions configuration/samples/guix_8bpp/README.md
Original file line number Diff line number Diff line change
Expand Up @@ -63,3 +63,9 @@ In case the device is R5F572ND, at Board tab, you can click [...] button behind
to quickly go to Change Device dialog and change target device to R5F572NN.

This issue is fixed from board version v1.12.

2.5. When using RX microcontrollers with DPFPU
Target projects (RX72N, RX671):
- Projects with the double precision floating point instruction generation option (CC-RX: -dpfpu, GCC: --mdfpu=64, IAR: --fpu=64) enabled on RXv3 core devices
Workaround:
- Call tx_thread_fpu_enable() at the beginning of every task.
6 changes: 6 additions & 0 deletions configuration/samples/iot_sdk/README.md
Original file line number Diff line number Diff line change
Expand Up @@ -44,3 +44,9 @@ In Smart Configurator editor (<projectname>.scfg)
RXDx and TXDx should be used but the default setting could be SMISOx and SMOSIx

This issue is fixed from e2 studio 2023-04 and Smart Configurator for RX 2.17.

2.4. When using RX microcontrollers with DPFPU
Target projects (RX72N, RX671):
- Projects with the double precision floating point instruction generation option (CC-RX: -dpfpu, GCC: --mdfpu=64, IAR: --fpu=64) enabled on RXv3 core devices
Workaround:
- Call tx_thread_fpu_enable() at the beginning of every task.
8 changes: 7 additions & 1 deletion configuration/samples/iot_sdk/rsk-rx671/README.md
Original file line number Diff line number Diff line change
Expand Up @@ -62,4 +62,10 @@ In Smart Configurator editor (<projectname>.scfg)
check "RXD2/SMISO2/SSCL2 Pin"
check "TXD2/SMOSI2/SSDA2 Pin"
check "CTS2#/RTS2#/SS2# Pin"
And [Generate Code]
And [Generate Code]

2.4. When using RX microcontrollers with DPFPU
Target projects (RX72N, RX671):
- Projects with the double precision floating point instruction generation option (CC-RX: -dpfpu, GCC: --mdfpu=64, IAR: --fpu=64) enabled on RXv3 core devices
Workaround:
- Call tx_thread_fpu_enable() at the beginning of every task.
8 changes: 7 additions & 1 deletion configuration/samples/iot_sdk/rx72n-envision-kit/README.md
Original file line number Diff line number Diff line change
Expand Up @@ -50,4 +50,10 @@ In Smart Configurator editor (<projectname>.scfg)
- go to Pins tab
- at Pin Function, select SCI channel being used on the left panel (channel with opened blue box)
- on the right panel, check and change the pin function if it is incorrect:
RXDx and TXDx should be used but the default setting could be SMISOx and SMOSIx
RXDx and TXDx should be used but the default setting could be SMISOx and SMOSIx

2.5. When using RX microcontrollers with DPFPU
Target projects (RX72N, RX671):
- Projects with the double precision floating point instruction generation option (CC-RX: -dpfpu, GCC: --mdfpu=64, IAR: --fpu=64) enabled on RXv3 core devices
Workaround:
- Call tx_thread_fpu_enable() at the beginning of every task.
6 changes: 6 additions & 0 deletions configuration/samples/iot_sdk_pnp/README.md
Original file line number Diff line number Diff line change
Expand Up @@ -44,3 +44,9 @@ In Smart Configurator editor (<projectname>.scfg)
RXDx and TXDx should be used but the default setting could be SMISOx and SMOSIx

This issue is fixed from e2 studio 2023-04 and Smart Configurator for RX 2.17.

2.4. When using RX microcontrollers with DPFPU
Target projects (RX72N, RX671):
- Projects with the double precision floating point instruction generation option (CC-RX: -dpfpu, GCC: --mdfpu=64, IAR: --fpu=64) enabled on RXv3 core devices
Workaround:
- Call tx_thread_fpu_enable() at the beginning of every task.
8 changes: 7 additions & 1 deletion configuration/samples/iot_sdk_pnp/rsk-rx671/README.md
Original file line number Diff line number Diff line change
Expand Up @@ -61,4 +61,10 @@ In Smart Configurator editor (<projectname>.scfg)
check "RXD2/SMISO2/SSCL2 Pin"
check "TXD2/SMOSI2/SSDA2 Pin"
check "CTS2#/RTS2#/SS2# Pin"
And [Generate Code]
And [Generate Code]

2.4. When using RX microcontrollers with DPFPU
Target projects (RX72N, RX671):
- Projects with the double precision floating point instruction generation option (CC-RX: -dpfpu, GCC: --mdfpu=64, IAR: --fpu=64) enabled on RXv3 core devices
Workaround:
- Call tx_thread_fpu_enable() at the beginning of every task.
Original file line number Diff line number Diff line change
Expand Up @@ -51,3 +51,9 @@ In Smart Configurator editor (<projectname>.scfg)
- at Pin Function, select SCI channel being used on the left panel (channel with opened blue box)
- on the right panel, check and change the pin function if it is incorrect:
RXDx and TXDx should be used but the default setting could be SMISOx and SMOSIx

2.5. When using RX microcontrollers with DPFPU
Target projects (RX72N, RX671):
- Projects with the double precision floating point instruction generation option (CC-RX: -dpfpu, GCC: --mdfpu=64, IAR: --fpu=64) enabled on RXv3 core devices
Workaround:
- Call tx_thread_fpu_enable() at the beginning of every task.
6 changes: 6 additions & 0 deletions configuration/samples/iperf/README.md
Original file line number Diff line number Diff line change
Expand Up @@ -38,3 +38,9 @@ For example, if you create project with C++ option and CC-RX compiler, you will

2.3. Current Iperf sample project does not work well with JPerf.
We will improve the sample at next version.

2.4. When using RX microcontrollers with DPFPU
Target projects (RX72N, RX671):
- Projects with the double precision floating point instruction generation option (CC-RX: -dpfpu, GCC: --mdfpu=64, IAR: --fpu=64) enabled on RXv3 core devices
Workaround:
- Call tx_thread_fpu_enable() at the beginning of every task.
6 changes: 6 additions & 0 deletions configuration/samples/low_power/README.md
Original file line number Diff line number Diff line change
Expand Up @@ -41,3 +41,9 @@ In Smart Configurator editor (<projectname>.scfg)
- go to Pins tab
- at Pin Function, select "Interrupt controller unit"
- on the right panel, check and change the pin assignment for IRQ channel being used if it is incorrect

2.4. When using RX microcontrollers with DPFPU
Target projects (RX72N, RX671):
- Projects with the double precision floating point instruction generation option (CC-RX: -dpfpu, GCC: --mdfpu=64, IAR: --fpu=64) enabled on RXv3 core devices
Workaround:
- Call tx_thread_fpu_enable() at the beginning of every task.
8 changes: 7 additions & 1 deletion configuration/samples/minimal/README.md
Original file line number Diff line number Diff line change
Expand Up @@ -41,4 +41,10 @@ In Smart Configurator editor (<projectname>.scfg)
- go to Pins tab
- at Pin Function, select SCI channel being used on the left panel (channel with opened blue box)
- on the right panel, check and change the pin function if it is incorrect:
RXDx and TXDx should be used but the default setting could be SMISOx and SMOSIx
RXDx and TXDx should be used but the default setting could be SMISOx and SMOSIx

2.4 When using RX microcontrollers with DPFPU
Target projects (RX72N, RX671):
- Projects with the double precision floating point instruction generation option (CC-RX: -dpfpu, GCC: --mdfpu=64, IAR: --fpu=64) enabled on RXv3 core devices
Workaround:
- Call tx_thread_fpu_enable() at the beginning of every task.
6 changes: 6 additions & 0 deletions configuration/samples/ping/README.md
Original file line number Diff line number Diff line change
Expand Up @@ -50,3 +50,9 @@ if you see build error related to duplicate symbol "_nxde_dns_host_by_name_get",
please open libs\netxduo_addons\addons\dns\nxd_dns.c and comment out _nxde_dns_host_by_name_get function.

This issue is fixed from Smart Configurator for RX 2.17.

2.5 When using RX microcontrollers with DPFPU
Target projects (RX72N, RX671):
- Projects with the double precision floating point instruction generation option (CC-RX: -dpfpu, GCC: --mdfpu=64, IAR: --fpu=64) enabled on RXv3 core devices
Workaround:
- Call tx_thread_fpu_enable() at the beginning of every task.
6 changes: 6 additions & 0 deletions configuration/samples/ping/rsk-rx671/README.md
Original file line number Diff line number Diff line change
Expand Up @@ -45,3 +45,9 @@ For example, if you create project with C++ option and CC-RX compiler, you will
_ebss = .;
_end = .;
} > RAM

2.3. When using RX microcontrollers with DPFPU
Target projects (RX72N, RX671):
- Projects with the double precision floating point instruction generation option (CC-RX: -dpfpu, GCC: --mdfpu=64, IAR: --fpu=64) enabled on RXv3 core devices
Workaround:
- Call tx_thread_fpu_enable() at the beginning of every task.
8 changes: 7 additions & 1 deletion configuration/samples/ramdisk/README.md
Original file line number Diff line number Diff line change
Expand Up @@ -43,4 +43,10 @@ You can go to [Board] tab of Smart Configurator editor to check the correctness
In case the device is R5F572ND, at Board tab, you can click [...] button behind the Board combo-box
to quickly go to Change Device dialog and change target device to R5F572NN.

This issue is fixed from board version v1.12.
This issue is fixed from board version v1.12.

2.3 When using RX microcontrollers with DPFPU
Target projects (RX72N, RX671):
- Projects with the double precision floating point instruction generation option (CC-RX: -dpfpu, GCC: --mdfpu=64, IAR: --fpu=64) enabled on RXv3 core devices
Workaround:
- Call tx_thread_fpu_enable() at the beginning of every task.
6 changes: 6 additions & 0 deletions configuration/samples/usbx_device_cdc_acm/README.md
Original file line number Diff line number Diff line change
Expand Up @@ -40,6 +40,12 @@ When using GCC compiler, the "_end" section in src/linker_script.ld should be at

When you connect RX65N Cloud Kit to your PC and get USB device not recognized message from Windows, please go to Clock page of Smart Configurator, enable SCKCR2 and set USB clock to 48MHz.

When using RX microcontrollers with DPFPU
Target projects (RX72N, RX671):
- Projects with the double precision floating point instruction generation option (CC-RX: -dpfpu, GCC: --mdfpu=64, IAR: --fpu=64) enabled on RXv3 core devices
Workaround:
- Call tx_thread_fpu_enable() at the beginning of every task.


Changes of sample project
=========================
Expand Down
6 changes: 6 additions & 0 deletions configuration/samples/usbx_hmsc/README.md
Original file line number Diff line number Diff line change
Expand Up @@ -43,3 +43,9 @@ In Smart Configurator editor (<projectname>.scfg)
- on the right panel, check and change USB0_VBUSEN pin number if it is incorrect (there is a warning icon)

This issue will be fixed at that next update of RSK board description file.

2.4 When using RX microcontrollers with DPFPU
Target projects (RX72N, RX671):
- Projects with the double precision floating point instruction generation option (CC-RX: -dpfpu, GCC: --mdfpu=64, IAR: --fpu=64) enabled on RXv3 core devices
Workaround:
- Call tx_thread_fpu_enable() at the beginning of every task.

0 comments on commit 6e4afa6

Please sign in to comment.