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Slides for 10 Oct meeting
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---
title: "Composable Custom Extensions TG Meeting"
author: Darius Rad `<darius@bluespec.com>`$\newline$Jan Gray `<jan@fpga.org>`
date: 10 October 2024
output: beamer_presentation
theme: "Warsaw"
---

## Disclosures

<https://lf-riscv.atlassian.net/wiki/spaces/HOME/pages/16154892/Meeting+Disclosures>

## Agenda

- Upcoming meetings
- Development plan
- Request for volunteers
- Requirements discussion

## Upcoming meetings

- RISC-V Summit, Santa Clara
- Monday, 21 October, 11 am - noon, Room 207 (in person only)
- Regular meetings to continue
- 24 October
- 7 November
-

## Development plan

- Organized as Work Breakdown Structure (WBS)
- Hierarchy of work items
- Tracks owner, time estimates, progress
- Used to establish timeline for freeze, for ratification plan
- If interested, review and share feedback on list

## Request for volunteers

- QEMU (simulator support)
- binutils, gcc (ABI support)
- RISC-V ACT
- RISC-V SAIL
- Unified Discovery
- OpenSBI
- Linux
- devicetree
- ACPI
- context switch
- user ABI (hwprobe, prctl, sysfs)
- glibc
- hardware
- ISA
- logic interface

## Requirements discussion

- Main open topics
- Extension state (one/many, hart state or not)
- Opcodes (all custom opcodes or subset, one/multiple ranges)
- Hotpluggable extensions
- Logic interface capabilities
- Need to provide time estimate for ratification plan
- Intend to defer decisions until later
- Hope that starting development can inform discussion and decision
- Lack of volunteers for tasks will end up in features being eliminated

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