updated ISA section

riscv-software-src · Jul 5, 2024 · 72c029a · 72c029a
1 parent 65c48d3
commit 72c029a
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/sample_cgfs/rv32zilsd_priv.cgf b/sample_cgfs/rv32zilsd_priv.cgf
@@ -22,7 +22,7 @@ misalign-ld:
   config:
     - check ISA:=regex(.*I.*Zilsd.*); check hw_data_misaligned_support:=True
     - check ISA:=regex(.*I.*Zicsr.*Zilsd.); check hw_data_misaligned_support:=False; def rvtest_mtrap_routine=True
-  cond: check ISA:=regex(.*32.*I.*)
+  cond: check ISA:=regex(.*32.*I.*Zicsr.*)
   mnemonics:
     ldz: 0
   rs1: