Skip to content
This repository has been archived by the owner on Nov 4, 2024. It is now read-only.

Commit

Permalink
Merge pull request #108 from riscv-software-src/dev
Browse files Browse the repository at this point in the history
Fix test.yml
  • Loading branch information
neelgala authored Feb 28, 2024
2 parents 41d184b + f65cbb0 commit b4513e6
Show file tree
Hide file tree
Showing 4 changed files with 11 additions and 7 deletions.
11 changes: 6 additions & 5 deletions .github/workflows/test.yml
Original file line number Diff line number Diff line change
@@ -1,9 +1,7 @@
name: test
on:
pull_request:
branches:
-master
-dev
branches: [ master, dev ]
workflow_dispatch:

jobs:
Expand Down Expand Up @@ -45,7 +43,7 @@ jobs:
set -e
for cgf_file in ./sample_cgfs/*.cgf; do
if [ "$cgf_file" != "./sample_cgfs/dataset.cgf" ]; then
if [[ "$cgf_file" != *rv32e* ]] && [[ "cgf_file" == *rv32* ]] && [ "${{matrix.architecture}}" == "rv32i" ] ; then
if [[ "$cgf_file" != *rv32e* ]] && [[ "$cgf_file" == *rv32* ]] && [ "${{matrix.architecture}}" == "rv32i" ] ; then
cmd="riscv_ctg -r -d ./tests -bi rv32i -cf sample_cgfs/dataset.cgf -cf \"$cgf_file\" -v warning -p \$(nproc)"
echo $cmd
eval $cmd || { echo "Error executing command: $cmd"; exit 1; }
Expand Down Expand Up @@ -82,11 +80,14 @@ jobs:
done
check-version:
if: github.ref == 'refs/heads/master'
if: github.event.pull_request.base.ref == 'master' && github.event_name == 'pull_request'
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@v2

- uses: actions-ecosystem/action-get-latest-tag@v1
id: get-latest-tag

- name: version check
run: |
export CHNGVER=$(grep -P -o '(?<=## \[).*(?=\])' -m1 CHANGELOG.md);
Expand Down
3 changes: 3 additions & 0 deletions CHANGELOG.md
Original file line number Diff line number Diff line change
Expand Up @@ -6,6 +6,9 @@ Please note the header `WIP-DEV` is to always remain indicating the changes done
Only when a release to the main branch is done, the contents of the WIP-DEV are put under a
versioned header while the `WIP-DEV` is left empty

## [0.12.1] - 2024-02-27
- Fix test.yml

## [0.12.0] - 2024-02-22
- Update generator.py to take care of hard coded register testcases only if a hard coded register is assigned in the op_comb node of a coverpoint of an instruction.
- Add hardcoded register testcases to dataset.cgf and rv32im.cgf
Expand Down
2 changes: 1 addition & 1 deletion riscv_ctg/__init__.py
Original file line number Diff line number Diff line change
Expand Up @@ -4,4 +4,4 @@

__author__ = """InCore Semiconductors Pvt Ltd"""
__email__ = 'incorebot@gmail.com'
__version__ = '0.12.0'
__version__ = '0.12.1'
2 changes: 1 addition & 1 deletion setup.cfg
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
[bumpversion]
current_version = 0.12.0
current_version = 0.12.1
commit = True
tag = True

Expand Down

0 comments on commit b4513e6

Please sign in to comment.