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CSR tests should emit Zicsr in test ISA string #96
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Updating CONTRIBUTING.rst to capture the new git strategy
Signed-off-by: Abdul Wadood <abdulwadood.afzal88@gmail.com>
Signed-off-by: Abdul Wadood <abdulwadood.afzal88@gmail.com>
Signed-off-by: Abdul Wadood <abdulwadood.afzal88@gmail.com>
Signed-off-by: Abdul Wadood <abdulwadood.afzal88@gmail.com>
Generate only signed values for `amominu` and `amomaxu` tests Signed-off-by: Abdul Wadood <abdulwadood.afzal88@gmail.com>
Signed-off-by: Abdul Wadood <abdulwadood.afzal88@gmail.com>
Update stride to incorporate two signature per test instance Remove the register Signed-off-by: Abdul Wadood <abdulwadood.afzal88@gmail.com>
Signed-off-by: Abdul Wadood <abdulwadood.afzal88@gmail.com>
Signed-off-by: Abdul Wadood <abdulwadood.afzal88@gmail.com>
Add support for standard Atomic (A) Extension
Signed-off-by: Abdul Wadood <abdulwadood.afzal88@gmail.com>
Signed-off-by: Abdul Wadood <abdulwadood.afzal88@gmail.com>
Signed-off-by: Abdul Wadood <abdulwadood.afzal88@gmail.com>
Signed-off-by: Abdul Wadood <abdulwadood.afzal88@gmail.com>
Signed-off-by: Abdul Wadood <abdulwadood.afzal88@gmail.com>
Signed-off-by: Abdul Wadood <abdulwadood.afzal88@gmail.com>
Add support for `Zcb` instructions from RISC-V code size reduction extension
Signed-off-by: Eman Fatima <134972860+EmanFatima-ef@users.noreply.github.com>
Signed-off-by: ved-rivos <91900059+ved-rivos@users.noreply.github.com>
Added Zifencei, Bit Manipulation and Privilege tests cgf files for RV32E
Add unratified Zacas extension
…89/DivMostNegNumWithMinusOne Added corner case for dividing most neg number with -1
…ode_register Missing Coverage for the Hardcoded register Test Cases added
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The CSR comb only emits base ISA causing riscof to not emit zicsr in the isa string in the generated Makefile.