Added hyperlinks to Svvptc specs.

riscv · Feb 26, 2024 · ada6cc3 · ada6cc3
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diff --git a/rva23-profile.adoc b/rva23-profile.adoc
@@ -443,6 +443,7 @@ Instruction Set Manual; the hyperlinks lead to their separate specifications.
 - https://github.com/riscv/riscv-time-compare[Sstc Extension for Supervisor-mode Timer Interrupts]
 - https://github.com/riscv/riscv-count-overflow[Sscofpmf Extension for Count Overflow and Mode-Based Filtering]
 - https://github.com/riscv/riscv-state-enable[Smstateen Extension for State-enable]
+- https://github.com/riscv/riscv-svvptc[Svvptc Eliding Memory-management Fences on setting PTE valid]
 
 - *Ziccif*: Main memory supports instruction fetch with atomicity requirement
 - *Ziccrse*: Main memory supports forward progress on LR/SC sequences

diff --git a/rvb23-profile.adoc b/rvb23-profile.adoc
@@ -444,6 +444,7 @@ Instruction Set Manual; the hyperlinks lead to their separate specifications.
 - https://github.com/riscv/riscv-time-compare[Sstc Extension for Supervisor-mode Timer Interrupts]
 - https://github.com/riscv/riscv-count-overflow[Sscofpmf Extension for Count Overflow and Mode-Based Filtering]
 - https://github.com/riscv/riscv-state-enable[Smstateen Extension for State-enable]
+- https://github.com/riscv/riscv-svvptc[Svvptc Eliding Memory-management Fences on setting PTE valid]
 
 - *Ziccif*: Main memory supports instruction fetch with atomicity requirement
 - *Ziccrse*: Main memory supports forward progress on LR/SC sequences