Add missing mstatus.MPP legalization

[ved-rivos]

mstatus.MPP legal values are User (00) (if U-mode implemented), Supervisor (01) (if S-mode implemented) and Machine (11). Encoding 10 is illegal.

[nwf-msr]

Something also needs to happen at initialization, I think? Right now

sail-riscv/model/riscv_sys_control.sail

Line 553 in d5e89a7

function init_sys() -> unit = {

leaves mstatus[MPP] as 0b00, even if that's not a legal value (say, on a M-mode-only core).

[ved-rivos]

Something also needs to happen at initialization, I think? Right now

sail-riscv/model/riscv_sys_control.sail

Line 553 in d5e89a7

function init_sys() -> unit = {

leaves mstatus[MPP] as 0b00, even if that's not a legal value (say, on a M-mode-only core).

Agree. This was missed. I have committed an update to fix this.

[arichardson]

LGTM. I slightly prefer using an if/else instead of tuple match (since the first element is only needed for one case), but happy either way.

  if not(haveUsrMode()) then privLevel_to_bits(Machine)
  else match p {
    0b01 => if haveSupMode() then p else privLevel_to_bits(User),
    0b10 => privLevel_to_bits(if haveSupMode() then Supervisor else Machine),
    _ => p
  }

[Timmmm]

We also came across this, so... alternative implementation, which I think is clearer:

function havePrivilegeMode(priv : priv_level) -> bool =
  match priv {
    0b00 => haveUsrMode(),
    0b01 => haveSupMode(),
    0b10 => false,
    0b11 => true,
  }

// Note, you cannot have Supervisor mode without User mode.
function lowestSupportedPrivilegeMode() -> Privilege =
  if haveUsrMode() then User else Machine

...
  let m = [m with MPP=if havePrivilegeMode(m[MPP]) then m[MPP]
                      else privLevel_to_bits(lowestSupportedPrivilegeMode())];

[ved-rivos]

We also came across this, so... alternative implementation, which I think is clearer:

This is nicer. Updated to this.

[github-actions]

Test Results

712 tests  ±0   712 ✅ ±0   0s ⏱️ ±0s
  6 suites ±0     0 💤 ±0 
  1 files   ±0     0 ❌ ±0 

Results for commit 6ef392e. ± Comparison against base commit 9602e3a.

[Timmmm]

LGTM, thanks!

[Timmmm]

@billmcspadden-riscv We should merge this fix IMO. It's been a few months and there are no issues with it.

[Timmmm]

I'll merge this next week if nobody objects.