Skip to content

Commit

Permalink
xtensa: update capstone and fix tests
Browse files Browse the repository at this point in the history
  • Loading branch information
@imbillow
imbillow committed Nov 2, 2024
1 parent 514b7b5 commit 3f26159
Show file tree
Hide file tree
Showing 3 changed files with 5 additions and 4 deletions.
2 changes: 1 addition & 1 deletion subprojects/capstone-next.wrap
View file
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
[wrap-git]
url = https://github.com/capstone-engine/capstone.git
revision = 09f35961cb578cecfc4aee96a1e45bc2abc2d094
revision = f6f967961b913cf4fc1c6233f6cf42194a0938ca
directory = capstone-next
patch_directory = capstone-next
depth = 1
3 changes: 2 additions & 1 deletion test/db/analysis/xtensa
View file
Original file line number Diff line number Diff line change
Expand Up @@ -13,6 +13,7 @@ RUN

NAME=xtensa stackframe
FILE=malloc://512
BROKEN=1
CMDS=<<EOF
e asm.arch=xtensa
e asm.bits=32
Expand All @@ -37,7 +38,7 @@ wx 00000000ff11ff1121ffff0df0ff
pD 3 @ 8
EOF
EXPECT=<<EOF
0x00000008 l32r a2, 0x00000004 ; [0x4:4]=0x11ff11ff
0x00000008 l32r a2, . -8
EOF
RUN

4 changes: 2 additions & 2 deletions test/db/cmd/cmd_list
View file
Original file line number Diff line number Diff line change
Expand Up @@ -444,7 +444,7 @@ a____ 16 32 64 x86.nasm LGPL3 X86 nasm assembler
a____ 16 32 64 x86.nz LGPL3 x86 handmade assembler
_dA__ 16 xap PD XAP4 RISC (CSR)
_dA__ 32 xcore BSD Capstone XCore disassembler (by pancake)
_dAe_ 32 xtensa GPL3 XTensa CPU
_dA_I 32 xtensa LGPL3 Capstone Xtensa disassembly plugin
adA__ 8 z80 GPL3 Zilog Z80 (by condret)
EOF
RUN
Expand Down Expand Up @@ -526,7 +526,7 @@ NAME=Print the asm/analysis plugins in JSON
FILE==
CMDS=Laj
EXPECT=<<EOF
["6502":{"bits":"8 16 ","license":"LGPL3","description":"6502/NES/C64/Tamagotchi/T-1000 CPU","features":"_d"},"8051":{"bits":"8 ","license":"PD","description":"8051 Intel CPU","features":"ad"},"amd29k":{"bits":"32 ","license":"LGPL3","description":"AMD 29k RISC CPU","features":"_d"},"arc":{"bits":"16 32 ","license":"GPL3","description":"Argonaut RISC Core","features":"_d"},"arm":{"bits":"16 32 64","license":"BSD","description":"Capstone ARM disassembler","features":"ad"},"arm.as":{"bits":"16 32 64","license":"LGPL3","description":"as ARM Assembler (use RZ_ARM32_AS and RZ_ARM64_AS environment)","features":"a_"},"avr":{"bits":"8 16 ","license":"LGPL3","description":"AVR Atmel","features":"ad"},"bf":{"bits":"16 32 64","license":"LGPL3","description":"Brainfuck","features":"ad"},"chip8":{"bits":"32 ","license":"LGPL3","description":"Chip8 disassembler","features":"_d"},"cil":{"bits":"16 32 64","license":"LGPL3","description":".NET Common Intermediate Language","features":"_d"},"cr16":{"bits":"16 ","license":"LGPL3","description":"cr16 disassembly plugin","features":"_d"},"cris":{"bits":"32 ","license":"GPL3","description":"Axis Communications 32-bit embedded processor","features":"_d"},"dalvik":{"bits":"32 64","license":"LGPL3","description":"AndroidVM Dalvik","features":"ad"},"dcpu16":{"bits":"16 ","license":"PD","description":"Mojang's DCPU-16","features":"ad"},"ebc":{"bits":"32 64","license":"LGPL3","description":"EFI Bytecode","features":"_d"},"gb":{"bits":"16 ","license":"LGPL3","description":"GameBoy(TM) (z80-like)","features":"ad"},"h8300":{"bits":"16 ","license":"LGPL3","description":"H8/300 disassembly plugin","features":"_d"},"hexagon":{"bits":"32 ","license":"LGPL3","description":"Qualcomm Hexagon (QDSP6) V6","features":"_d"},"hppa":{"bits":"32 ","license":"GPL3","description":"HP PA-RISC","features":"_d"},"i4004":{"bits":"4 ","license":"LGPL3","description":"Intel 4004 microprocessor","features":"_d"},"i8080":{"bits":"8 ","license":"BSD","description":"Intel 8080 CPU","features":"_d"},"java":{"bits":"32 ","license":"LGPL-3","description":"Java bytecode disassembler","features":"ad"},"lanai":{"bits":"32 ","license":"GPL3","description":"LANAI","features":"_d"},"lh5801":{"bits":"8 ","license":"LGPL3","description":"SHARP LH5801 disassembler","features":"_d"},"lm32":{"bits":"32 ","license":"BSD","description":"disassembly plugin for Lattice Micro 32 ISA","features":"_d"},"luac":{"bits":"8 ","license":"LGPL3","description":"luac disassemble plugin","features":"ad"},"m680x":{"bits":"8 32 ","license":"BSD","description":"Capstone M680X Disassembler","features":"_d"},"m68k":{"bits":"32 ","license":"BSD","description":"Capstone M68K disassembler","features":"_d"},"malbolge":{"bits":"32 ","license":"LGPL3","description":"Malbolge Ternary VM","features":"_d"},"mcore":{"bits":"32 ","license":"LGPL3","description":"Motorola MCORE disassembler","features":"_d"},"mcs96":{"bits":"16 ","license":"LGPL3","description":"condrets car","features":"_d"},"mips":{"bits":"16 32 64","license":"BSD","description":"Capstone MIPS disassembler","features":"ad"},"mips.gnu":{"bits":"32 64","license":"GPL3","description":"MIPS CPU","features":"ad"},"msp430":{"bits":"16 ","license":"LGPL3","description":"msp430 disassembly plugin","features":"_d"},"null":{"bits":"16 32 64","license":"MIT","description":"no disassemble","features":"ad"},"or1k":{"bits":"32 ","license":"LGPL3","description":"OpenRISC 1000","features":"_d"},"pic":{"bits":"16 32 ","license":"LGPL3","description":"PIC disassembler","features":"_d"},"ppc":{"bits":"32 64","license":"BSD","description":"Capstone PowerPC disassembler","features":"_d"},"ppc.as":{"bits":"32 64","license":"LGPL3","description":"as PPC Assembler (use RZ_PPC_AS environment)","features":"a_"},"propeller":{"bits":"32 ","license":"LGPL3","description":"propeller disassembly plugin","features":"_d"},"pyc":{"bits":"8 16 ","license":"LGPL3","description":"PYC disassemble plugin","features":"_d"},"riscv":{"bits":"32 64","license":"GPL3","description":"RISC-V","features":"_d"},"riscv.cs":{"bits":"32 64","license":"BSD","description":"Capstone RISCV disassembler","features":"_d"},"rl78":{"bits":"32 ","license":"LGPL3","description":"Renesas RL78 disassembler","features":"ad"},"rsp":{"bits":"32 ","license":"LGPL3","description":"Reality Signal Processor","features":"_d"},"rx":{"bits":"32 ","license":"LGPL3","description":"Renesas RX Family disassembler","features":"_d"},"sh":{"bits":"32 ","license":"LGPL3","description":"SuperH-4 CPU","features":"ad"},"snes":{"bits":"8 16 ","license":"LGPL3","description":"SuperNES CPU","features":"_d"},"sparc":{"bits":"32 64","license":"BSD","description":"Capstone SPARC disassembler","features":"_d"},"sparc.gnu":{"bits":"32 64","license":"GPL3","description":"Scalable Processor Architecture","features":"_d"},"spc700":{"bits":"16 ","license":"LGPL3","description":"spc700, snes' sound-chip","features":"_d"},"sysz":{"bits":"32 64","license":"BSD","description":"SystemZ CPU disassembler","features":"_d"},"tms320":{"bits":"32 ","license":"LGPL3","description":"TMS320 DSP family (c54x,c55x,c55x+,c64x)","features":"_d"},"tricore":{"bits":"32 ","license":"BSD","description":"Siemens TriCore CPU","features":"_d"},"v810":{"bits":"32 ","license":"LGPL3","description":"v810 disassembly plugin","features":"_d"},"v850":{"bits":"32 ","license":"LGPL3","description":"v850 disassembly plugin","features":"_d"},"vax":{"bits":"8 32 ","license":"GPL3","description":"VAX","features":"_d"},"wasm":{"bits":"32 ","license":"MIT","description":"WebAssembly","features":"ad"},"x86":{"bits":"16 32 64","license":"BSD","description":"Capstone X86 disassembler","features":"_d"},"x86.as":{"bits":"16 32 64","license":"LGPL3","description":"Intel X86 GNU Assembler (Use RZ_X86_AS env)","features":"a_"},"x86.nasm":{"bits":"16 32 64","license":"LGPL3","description":"X86 nasm assembler","features":"a_"},"x86.nz":{"bits":"16 32 64","license":"LGPL3","description":"x86 handmade assembler","features":"a_"},"xap":{"bits":"16 ","license":"PD","description":"XAP4 RISC (CSR)","features":"_d"},"xcore":{"bits":"32 ","license":"BSD","description":"Capstone XCore disassembler","features":"_d"},"xtensa":{"bits":"32 ","license":"GPL3","description":"XTensa CPU","features":"_d"},"z80":{"bits":"8 ","license":"GPL3","description":"Zilog Z80","features":"ad"}]
["6502":{"bits":"8 16 ","license":"LGPL3","description":"6502/NES/C64/Tamagotchi/T-1000 CPU","features":"_d"},"8051":{"bits":"8 ","license":"PD","description":"8051 Intel CPU","features":"ad"},"amd29k":{"bits":"32 ","license":"LGPL3","description":"AMD 29k RISC CPU","features":"_d"},"arc":{"bits":"16 32 ","license":"GPL3","description":"Argonaut RISC Core","features":"_d"},"arm":{"bits":"16 32 64","license":"BSD","description":"Capstone ARM disassembler","features":"ad"},"arm.as":{"bits":"16 32 64","license":"LGPL3","description":"as ARM Assembler (use RZ_ARM32_AS and RZ_ARM64_AS environment)","features":"a_"},"avr":{"bits":"8 16 ","license":"LGPL3","description":"AVR Atmel","features":"ad"},"bf":{"bits":"16 32 64","license":"LGPL3","description":"Brainfuck","features":"ad"},"chip8":{"bits":"32 ","license":"LGPL3","description":"Chip8 disassembler","features":"_d"},"cil":{"bits":"16 32 64","license":"LGPL3","description":".NET Common Intermediate Language","features":"_d"},"cr16":{"bits":"16 ","license":"LGPL3","description":"cr16 disassembly plugin","features":"_d"},"cris":{"bits":"32 ","license":"GPL3","description":"Axis Communications 32-bit embedded processor","features":"_d"},"dalvik":{"bits":"32 64","license":"LGPL3","description":"AndroidVM Dalvik","features":"ad"},"dcpu16":{"bits":"16 ","license":"PD","description":"Mojang's DCPU-16","features":"ad"},"ebc":{"bits":"32 64","license":"LGPL3","description":"EFI Bytecode","features":"_d"},"gb":{"bits":"16 ","license":"LGPL3","description":"GameBoy(TM) (z80-like)","features":"ad"},"h8300":{"bits":"16 ","license":"LGPL3","description":"H8/300 disassembly plugin","features":"_d"},"hexagon":{"bits":"32 ","license":"LGPL3","description":"Qualcomm Hexagon (QDSP6) V6","features":"_d"},"hppa":{"bits":"32 ","license":"GPL3","description":"HP PA-RISC","features":"_d"},"i4004":{"bits":"4 ","license":"LGPL3","description":"Intel 4004 microprocessor","features":"_d"},"i8080":{"bits":"8 ","license":"BSD","description":"Intel 8080 CPU","features":"_d"},"java":{"bits":"32 ","license":"LGPL-3","description":"Java bytecode disassembler","features":"ad"},"lanai":{"bits":"32 ","license":"GPL3","description":"LANAI","features":"_d"},"lh5801":{"bits":"8 ","license":"LGPL3","description":"SHARP LH5801 disassembler","features":"_d"},"lm32":{"bits":"32 ","license":"BSD","description":"disassembly plugin for Lattice Micro 32 ISA","features":"_d"},"luac":{"bits":"8 ","license":"LGPL3","description":"luac disassemble plugin","features":"ad"},"m680x":{"bits":"8 32 ","license":"BSD","description":"Capstone M680X Disassembler","features":"_d"},"m68k":{"bits":"32 ","license":"BSD","description":"Capstone M68K disassembler","features":"_d"},"malbolge":{"bits":"32 ","license":"LGPL3","description":"Malbolge Ternary VM","features":"_d"},"mcore":{"bits":"32 ","license":"LGPL3","description":"Motorola MCORE disassembler","features":"_d"},"mcs96":{"bits":"16 ","license":"LGPL3","description":"condrets car","features":"_d"},"mips":{"bits":"16 32 64","license":"BSD","description":"Capstone MIPS disassembler","features":"ad"},"mips.gnu":{"bits":"32 64","license":"GPL3","description":"MIPS CPU","features":"ad"},"msp430":{"bits":"16 ","license":"LGPL3","description":"msp430 disassembly plugin","features":"_d"},"null":{"bits":"16 32 64","license":"MIT","description":"no disassemble","features":"ad"},"or1k":{"bits":"32 ","license":"LGPL3","description":"OpenRISC 1000","features":"_d"},"pic":{"bits":"16 32 ","license":"LGPL3","description":"PIC disassembler","features":"_d"},"ppc":{"bits":"32 64","license":"BSD","description":"Capstone PowerPC disassembler","features":"_d"},"ppc.as":{"bits":"32 64","license":"LGPL3","description":"as PPC Assembler (use RZ_PPC_AS environment)","features":"a_"},"propeller":{"bits":"32 ","license":"LGPL3","description":"propeller disassembly plugin","features":"_d"},"pyc":{"bits":"8 16 ","license":"LGPL3","description":"PYC disassemble plugin","features":"_d"},"riscv":{"bits":"32 64","license":"GPL3","description":"RISC-V","features":"_d"},"riscv.cs":{"bits":"32 64","license":"BSD","description":"Capstone RISCV disassembler","features":"_d"},"rl78":{"bits":"32 ","license":"LGPL3","description":"Renesas RL78 disassembler","features":"ad"},"rsp":{"bits":"32 ","license":"LGPL3","description":"Reality Signal Processor","features":"_d"},"rx":{"bits":"32 ","license":"LGPL3","description":"Renesas RX Family disassembler","features":"_d"},"sh":{"bits":"32 ","license":"LGPL3","description":"SuperH-4 CPU","features":"ad"},"snes":{"bits":"8 16 ","license":"LGPL3","description":"SuperNES CPU","features":"_d"},"sparc":{"bits":"32 64","license":"BSD","description":"Capstone SPARC disassembler","features":"_d"},"sparc.gnu":{"bits":"32 64","license":"GPL3","description":"Scalable Processor Architecture","features":"_d"},"spc700":{"bits":"16 ","license":"LGPL3","description":"spc700, snes' sound-chip","features":"_d"},"sysz":{"bits":"32 64","license":"BSD","description":"SystemZ CPU disassembler","features":"_d"},"tms320":{"bits":"32 ","license":"LGPL3","description":"TMS320 DSP family (c54x,c55x,c55x+,c64x)","features":"_d"},"tricore":{"bits":"32 ","license":"BSD","description":"Siemens TriCore CPU","features":"_d"},"v810":{"bits":"32 ","license":"LGPL3","description":"v810 disassembly plugin","features":"_d"},"v850":{"bits":"32 ","license":"LGPL3","description":"v850 disassembly plugin","features":"_d"},"vax":{"bits":"8 32 ","license":"GPL3","description":"VAX","features":"_d"},"wasm":{"bits":"32 ","license":"MIT","description":"WebAssembly","features":"ad"},"x86":{"bits":"16 32 64","license":"BSD","description":"Capstone X86 disassembler","features":"_d"},"x86.as":{"bits":"16 32 64","license":"LGPL3","description":"Intel X86 GNU Assembler (Use RZ_X86_AS env)","features":"a_"},"x86.nasm":{"bits":"16 32 64","license":"LGPL3","description":"X86 nasm assembler","features":"a_"},"x86.nz":{"bits":"16 32 64","license":"LGPL3","description":"x86 handmade assembler","features":"a_"},"xap":{"bits":"16 ","license":"PD","description":"XAP4 RISC (CSR)","features":"_d"},"xcore":{"bits":"32 ","license":"BSD","description":"Capstone XCore disassembler","features":"_d"},"xtensa":{"bits":"32 ","license":"LGPL3","description":"Capstone Xtensa disassembly plugin","features":"_d"},"z80":{"bits":"8 ","license":"GPL3","description":"Zilog Z80","features":"ad"}]
EOF
RUN

Expand Down

0 comments on commit 3f26159

Please sign in to comment.