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Fix order of fields in HCR_EL2 #35

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Nov 14, 2024
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Fix order of fields in HCR_EL2 #35

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16 changes: 8 additions & 8 deletions src/registers/hcr_el2.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -170,14 +170,6 @@ register_bitfields! {u64,
/// state.
TIDCP OFFSET(20) NUMBITS(1) [],

/// Trap ID group 3. Traps EL1 reads of group 3 ID registers to EL2, when EL2 is enabled
/// in the current Security state.
///
/// 0 This control does not cause any instructions to be trapped.
/// 1 The specified EL1 read accesses to ID group 3 registers are trapped to EL2, when EL2
/// is enabled in the current Security state.
TID3 OFFSET(18) NUMBITS(1) [],

/// Trap SMC instructions. Traps EL1 execution of SMC instructions to EL2, when EL2 is
/// enabled in the current Security state.
///
Expand Down Expand Up @@ -216,6 +208,14 @@ register_bitfields! {u64,
EnableTrapEl1SmcToEl2 = 1,
],

/// Trap ID group 3. Traps EL1 reads of group 3 ID registers to EL2, when EL2 is enabled
/// in the current Security state.
///
/// 0 This control does not cause any instructions to be trapped.
/// 1 The specified EL1 read accesses to ID group 3 registers are trapped to EL2, when EL2
/// is enabled in the current Security state.
TID3 OFFSET(18) NUMBITS(1) [],

/// Default Cacheability.
///
/// 0 This control has no effect on the Non-secure EL1&0 translation regime.
Expand Down