Skip to content

VHDL (VHSIC Hardware Description Language) is a hardware description language used in electronic design automation to describe digital and mixed-signal systems such as field-programmable gate arrays and integrated circuits. VHDL can also be used as a general purpose parallel programming language.

Notifications You must be signed in to change notification settings

soumyadip007/VHDL-Modelsim-Altera-Simulator-COA

About

VHDL (VHSIC Hardware Description Language) is a hardware description language used in electronic design automation to describe digital and mixed-signal systems such as field-programmable gate arrays and integrated circuits. VHDL can also be used as a general purpose parallel programming language.

Topics

Resources

Stars

Watchers

Forks

Releases

No releases published

Packages

No packages published