https://drive.google.com/drive/folders/1FpDX877rbFLOxgtfdLhBflT9nhlNBhD3
-
Notifications
You must be signed in to change notification settings - Fork 1
VHDL (VHSIC Hardware Description Language) is a hardware description language used in electronic design automation to describe digital and mixed-signal systems such as field-programmable gate arrays and integrated circuits. VHDL can also be used as a general purpose parallel programming language.
soumyadip007/VHDL-Modelsim-Altera-Simulator-COA
This commit does not belong to any branch on this repository, and may belong to a fork outside of the repository.
Folders and files
Name | Name | Last commit message | Last commit date | |
---|---|---|---|---|
Repository files navigation
About
VHDL (VHSIC Hardware Description Language) is a hardware description language used in electronic design automation to describe digital and mixed-signal systems such as field-programmable gate arrays and integrated circuits. VHDL can also be used as a general purpose parallel programming language.
Topics
Resources
Stars
Watchers
Forks
Releases
No releases published
Packages 0
No packages published